Make d945gclf build.

Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Myles Watson <mylesgw@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4882 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

8 files changed, 26 insertions, 8 deletions

diff --git a/src/cpu/intel/Makefile.inc b/src/cpu/intel/Makefile.inc
index 7f8874fe27..dfc78592de 100644
--- a/src/cpu/intel/Makefile.inc
+++ b/src/cpu/intel/Makefile.inc
@@ -3,6 +3,7 @@
 #
 # Therefore: ONLY include Makefile.inc from socket directories!
 
+subdirs-$(CONFIG_CPU_INTEL_SOCKET_411) += socket_411
 subdirs-$(CONFIG_CPU_INTEL_SOCKET_BGA956) += bga956
 subdirs-$(CONFIG_CPU_INTEL_EP80579) += ep80579
 subdirs-$(CONFIG_CPU_INTEL_SOCKET_MFCPGA478) += socket_mFCPGA478
diff --git a/src/cpu/intel/model_106cx/Config.lb b/src/cpu/intel/model_106cx/Config.lb
index e20eebbd0a..c644d4f12c 100644
--- a/src/cpu/intel/model_106cx/Config.lb
+++ b/src/cpu/intel/model_106cx/Config.lb
@@ -22,8 +22,6 @@ default CONFIG_HAVE_MOVNTI=1
 
 dir /cpu/x86/tsc
 dir /cpu/x86/mtrr
-dir /cpu/x86/fpu
-dir /cpu/x86/sse
 dir /cpu/x86/lapic
 dir /cpu/x86/cache
 dir /cpu/x86/smm
diff --git a/src/mainboard/intel/d945gclf/Kconfig b/src/mainboard/intel/d945gclf/Kconfig
index 227fd34bac..76168aa318 100644
--- a/src/mainboard/intel/d945gclf/Kconfig
+++ b/src/mainboard/intel/d945gclf/Kconfig
@@ -21,18 +21,18 @@ config BOARD_INTEL_D945GCLF
 	bool "D945GCLF"
 	select ARCH_X86
 	select CPU_INTEL_CORE
-	select CPU_INTEL_SOCKET_MFCPGA478
+	select CPU_INTEL_SOCKET_411
 	select NORTHBRIDGE_INTEL_I945
 	select SOUTHBRIDGE_INTEL_I82801GX
-	select SUPERIO_WINBOND_W83627THG
+	select SUPERIO_SMSC_LPC47M15X
 	select HAVE_PIRQ_TABLE
 	select HAVE_MP_TABLE
 	select MMCONF_SUPPORT
 	select USE_PRINTK_IN_CAR
 	select AP_IN_SIPI_WAIT
 	select UDELAY_LAPIC
-	select HAVE_ACPI_TABLES
-	select HAVE_SMI_HANDLER
+	#select HAVE_ACPI_TABLES
+	#select HAVE_SMI_HANDLER
 	select BOARD_ROMSIZE_KB_1024
 
 config MAINBOARD_DIR
@@ -79,3 +79,8 @@ config MAX_PHYSICAL_CPUS
 	int
 	default 2
 	depends on BOARD_INTEL_D945GCLF
+
+config HAVE_INIT_TIMER
+	bool
+	default n
+	depends on BOARD_INTEL_D945GCLF
diff --git a/src/superio/smsc/Kconfig b/src/superio/smsc/Kconfig
index ac7b0dabc1..3c2ba07932 100644
--- a/src/superio/smsc/Kconfig
+++ b/src/superio/smsc/Kconfig
@@ -6,6 +6,8 @@ config SUPERIO_SMSC_LPC47B397
 	bool
 config SUPERIO_SMSC_LPC47M10X
 	bool
+config SUPERIO_SMSC_LPC47M15X
+	bool
 config SUPERIO_SMSC_LPC47N217
 	bool
 config SUPERIO_SMSC_SMSCSUPERIO
diff --git a/src/superio/smsc/Makefile.inc b/src/superio/smsc/Makefile.inc
index db59651c1d..98b87aa1ee 100644
--- a/src/superio/smsc/Makefile.inc
+++ b/src/superio/smsc/Makefile.inc
@@ -2,5 +2,6 @@ subdirs-y += fdc37m60x
 subdirs-y += lpc47b272
 subdirs-y += lpc47b397
 subdirs-y += lpc47m10x
+subdirs-y += lpc47m15x
 subdirs-y += lpc47n217
 subdirs-y += smscsuperio
diff --git a/src/superio/smsc/lpc47m15x/Makefile.inc b/src/superio/smsc/lpc47m15x/Makefile.inc
new file mode 100644
index 0000000000..25967e4013
--- /dev/null
+++ b/src/superio/smsc/lpc47m15x/Makefile.inc
@@ -0,0 +1,2 @@
+#config chip.h
+obj-$(CONFIG_SUPERIO_SMSC_LPC47M15X) += superio.o
diff --git a/src/superio/smsc/lpc47m15x/superio.c b/src/superio/smsc/lpc47m15x/superio.c
index 1d360d9259..80ee5c7e55 100644
--- a/src/superio/smsc/lpc47m15x/superio.c
+++ b/src/superio/smsc/lpc47m15x/superio.c
@@ -35,7 +35,6 @@
 // Forward declarations
 static void enable_dev(device_t dev);
 void lpc47m15x_pnp_set_resources(device_t dev);
-void lpc47m15x_pnp_set_resources(device_t dev);
 void lpc47m15x_pnp_enable_resources(device_t dev);
 void lpc47m15x_pnp_enable(device_t dev);
 static void lpc47m15x_init(device_t dev);
@@ -121,7 +120,7 @@ static void lpc47m15x_init(device_t dev)
 	case LPC47M15X_KBC:
 		res0 = find_resource(dev, PNP_IDX_IO0);
 		res1 = find_resource(dev, PNP_IDX_IO1);
-		pc_keyboard_init(&conf->keyboard);
+		init_pc_keyboard(0x60, 0x64, &conf->keyboard);
 		break;
 	}
 }
diff --git a/targets/intel/d945gclf/Config.lb b/targets/intel/d945gclf/Config.lb
new file mode 100644
index 0000000000..1c3057b8d2
--- /dev/null
+++ b/targets/intel/d945gclf/Config.lb
@@ -0,0 +1,10 @@
+target d945gclf
+mainboard intel/d945gclf
+
+romimage "fallback"
+	option CONFIG_USE_FALLBACK_IMAGE = 1
+	payload ../payload.elf
+end
+
+buildrom ./coreboot.rom CONFIG_ROM_SIZE "fallback"
+