vendorcode/amd/pi/00670F00/Lib: Remove folder

Now that the last dependency was resolved, remove AmdLib folder.

BUG=b:112525011
TEST=Build and boot grunt.

Change-Id: Ibd9a20bc358742520138b9b01f76d7fd2fac92ab
Signed-off-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
Reviewed-on: https://review.coreboot.org/28742
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-by: Charles Marslett <charles.marslett@amd.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

3 files changed, 0 insertions, 776 deletions

diff --git a/src/vendorcode/amd/pi/00670F00/Lib/amdlib.c b/src/vendorcode/amd/pi/00670F00/Lib/amdlib.c
deleted file mode 100644
index 8a4113f9b2..0000000000
--- a/src/vendorcode/amd/pi/00670F00/Lib/amdlib.c
+++ /dev/null
@@ -1,573 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * AMD Library
- *
- * Contains interface to the AMD AGESA library
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:      AGESA
- * @e sub-project:  Lib
- * @e \$Revision: 48409 $   @e \$Date: 2011-03-08 11:19:40 -0600 (Tue, 08 Mar 2011) $
- *
- */
-/*
- ******************************************************************************
- *
- * Copyright (c) 2008 - 2011, Advanced Micro Devices, Inc.
- *               2013 - 2014, Sage Electronic Engineering, LLC
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- ******************************************************************************
- */
-
-#include <AGESA.h>
-#include <cpuRegisters.h>
-#include "amdlib.h"
-CODE_GROUP (G1_PEICC)
-RDATA_GROUP (G1_PEICC)
-
-#if !defined(AMDLIB_OPTIMIZE)
-	#define AMDLIB_OPTIMIZE
-#endif
-
-BOOLEAN
-STATIC
-GetPciMmioAddress (
-     OUT   UINT64            *MmioAddress,
-     OUT   UINT32            *MmioSize,
-  IN       AMD_CONFIG_PARAMS *StdHeader
-  );
-
-VOID
-CpuidRead (
-  IN        UINT32      CpuidFcnAddress,
-  OUT       CPUID_DATA  *Value
-  );
-
-UINT8
-ReadNumberOfCpuCores(
-  void
-  );
-
-AMDLIB_OPTIMIZE
-UINT8
-ReadIo8 (
-  IN       UINT16 Address
-  )
-{
-  return __inbyte (Address);
-}
-
-AMDLIB_OPTIMIZE
-UINT16
-ReadIo16 (
-  IN       UINT16 Address
-  )
-{
-  return __inword (Address);
-}
-
-AMDLIB_OPTIMIZE
-UINT32
-ReadIo32 (
-  IN       UINT16 Address
-  )
-{
-  return __indword (Address);
-}
-
-AMDLIB_OPTIMIZE
-VOID
-WriteIo8 (
-  IN       UINT16 Address,
-  IN       UINT8 Data
-  )
-{
-  __outbyte (Address, Data);
-}
-
-AMDLIB_OPTIMIZE
-VOID
-WriteIo16 (
-  IN       UINT16 Address,
-  IN       UINT16 Data
-  )
-{
-  __outword (Address, Data);
-}
-
-AMDLIB_OPTIMIZE
-VOID
-WriteIo32 (
-  IN       UINT16 Address,
-  IN       UINT32 Data
-  )
-{
-   __outdword (Address, Data);
-}
-
-AMDLIB_OPTIMIZE
-STATIC
-UINT64 SetFsBase (
-  UINT64 address
-  )
-{
-  UINT64 hwcr;
-  hwcr = __readmsr (0xC0010015);
-  __writemsr (0xC0010015, hwcr | 1 << 17);
-  __writemsr (0xC0000100, address);
-  return hwcr;
-}
-
-AMDLIB_OPTIMIZE
-STATIC
-VOID
-RestoreHwcr (
-  UINT64
-  value
-  )
-{
-  __writemsr (0xC0010015, value);
-}
-
-AMDLIB_OPTIMIZE
-UINT8
-Read64Mem8 (
-  IN       UINT64 Address
-  )
-{
-  UINT8 dataRead;
-  UINT64 hwcrSave;
-  if ((Address >> 32) == 0) {
-    return *(volatile UINT8 *) (UINTN) Address;
-  }
-  hwcrSave = SetFsBase (Address);
-  dataRead = __readfsbyte (0);
-  RestoreHwcr (hwcrSave);
-  return dataRead;
-}
-
-AMDLIB_OPTIMIZE
-UINT16
-Read64Mem16 (
-  IN       UINT64 Address
-  )
-{
-  UINT16 dataRead;
-  UINT64 hwcrSave;
-  if ((Address >> 32) == 0) {
-    return *(volatile UINT16 *) (UINTN) Address;
-  }
-  hwcrSave = SetFsBase (Address);
-  dataRead = __readfsword (0);
-  RestoreHwcr (hwcrSave);
-  return dataRead;
-}
-
-AMDLIB_OPTIMIZE
-UINT32
-Read64Mem32 (
-  IN       UINT64 Address
-  )
-{
-  UINT32 dataRead;
-  UINT64 hwcrSave;
-  if ((Address >> 32) == 0) {
-    return *(volatile UINT32 *) (UINTN) Address;
-  }
-  hwcrSave = SetFsBase (Address);
-  dataRead = __readfsdword (0);
-  RestoreHwcr (hwcrSave);
-  return dataRead;
-  }
-
-AMDLIB_OPTIMIZE
-VOID
-Write64Mem8 (
-  IN       UINT64 Address,
-  IN       UINT8 Data
-  )
-{
-  if ((Address >> 32) == 0){
-    *(volatile UINT8 *) (UINTN) Address = Data;
-  }
-  else {
-    UINT64 hwcrSave;
-    hwcrSave = SetFsBase (Address);
-    __writefsbyte (0, Data);
-    RestoreHwcr (hwcrSave);
-  }
-}
-
-AMDLIB_OPTIMIZE
-VOID
-Write64Mem16 (
-  IN       UINT64 Address,
-  IN       UINT16 Data
-  )
-{
- if ((Address >> 32) == 0){
-   *(volatile UINT16 *) (UINTN) Address = Data;
- }
- else {
-   UINT64 hwcrSave;
-   hwcrSave = SetFsBase (Address);
-   __writefsword (0, Data);
-   RestoreHwcr (hwcrSave);
- }
-}
-
-AMDLIB_OPTIMIZE
-VOID
-Write64Mem32 (
-  IN       UINT64 Address,
-  IN       UINT32 Data
-  )
-{
-  if ((Address >> 32) == 0){
-    *(volatile UINT32 *) (UINTN) Address = Data;
-  }
-  else {
-    UINT64 hwcrSave;
-    hwcrSave = SetFsBase (Address);
-    __writefsdword (0, Data);
-    RestoreHwcr (hwcrSave);
-  }
-}
-
-AMDLIB_OPTIMIZE
-VOID
-LibAmdMsrRead (
-  IN       UINT32 MsrAddress,
-     OUT   UINT64 *Value,
-  IN OUT   AMD_CONFIG_PARAMS *ConfigPtr
-  )
-{
-  *Value = __readmsr (MsrAddress);
-}
-
-AMDLIB_OPTIMIZE
-VOID
-LibAmdMsrWrite (
-  IN       UINT32 MsrAddress,
-  IN       UINT64 *Value,
-  IN OUT   AMD_CONFIG_PARAMS *ConfigPtr
-  )
-{
-  __writemsr (MsrAddress, *Value);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Read IO port
- *
- *
- * @param[in] AccessWidth   Access width
- * @param[in] IoAddress     IO port address
- * @param[in] Value         Pointer to save data
- * @param[in] StdHeader     Standard configuration header
- *
- */
-VOID
-LibAmdIoRead (
-  IN       ACCESS_WIDTH AccessWidth,
-  IN       UINT16 IoAddress,
-     OUT   VOID *Value,
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  )
-{
-  switch (AccessWidth) {
-  case AccessWidth8:
-  case AccessS3SaveWidth8:
-    *(UINT8 *) Value = ReadIo8 (IoAddress);
-    break;
-  case AccessWidth16:
-  case AccessS3SaveWidth16:
-    *(UINT16 *) Value = ReadIo16 (IoAddress);
-    break;
-  case AccessWidth32:
-  case AccessS3SaveWidth32:
-    *(UINT32 *) Value = ReadIo32 (IoAddress);
-    break;
-  default:
-    ASSERT (FALSE);
-    break;
-  }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Write IO port
- *
- *
- * @param[in] AccessWidth   Access width
- * @param[in] IoAddress     IO port address
- * @param[in] Value         Pointer to data
- * @param[in] StdHeader     Standard configuration header
- *
- */
-VOID
-LibAmdIoWrite (
-  IN       ACCESS_WIDTH AccessWidth,
-  IN       UINT16 IoAddress,
-  IN       CONST VOID *Value,
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  )
-{
-  switch (AccessWidth) {
-  case AccessWidth8:
-  case AccessS3SaveWidth8:
-    WriteIo8 (IoAddress, *(UINT8 *) Value);
-    break;
-  case AccessWidth16:
-  case AccessS3SaveWidth16:
-    WriteIo16 (IoAddress, *(UINT16 *) Value);
-    break;
-  case AccessWidth32:
-  case AccessS3SaveWidth32:
-    WriteIo32 (IoAddress, *(UINT32 *) Value);
-    break;
-  default:
-    ASSERT (FALSE);
-    break;
-  }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Read memory/MMIO
- *
- *
- * @param[in] AccessWidth   Access width
- * @param[in] MemAddress    Memory address
- * @param[in] Value         Pointer to data
- * @param[in] StdHeader     Standard configuration header
- *
- */
-VOID
-LibAmdMemRead (
-  IN       ACCESS_WIDTH AccessWidth,
-  IN       UINT64 MemAddress,
-     OUT   VOID *Value,
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  )
-{
-  switch (AccessWidth) {
-  case AccessWidth8:
-  case AccessS3SaveWidth8:
-    *(UINT8 *) Value = Read64Mem8 (MemAddress);
-    break;
-  case AccessWidth16:
-  case AccessS3SaveWidth16:
-    *(UINT16 *) Value = Read64Mem16 (MemAddress);
-    break;
-  case AccessWidth32:
-  case AccessS3SaveWidth32:
-    *(UINT32 *) Value = Read64Mem32 (MemAddress);
-    break;
-  default:
-    ASSERT (FALSE);
-    break;
-  }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Write memory/MMIO
- *
- *
- * @param[in] AccessWidth   Access width
- * @param[in] MemAddress    Memory address
- * @param[in] Value         Pointer to data
- * @param[in] StdHeader     Standard configuration header
- *
- */
-VOID
-LibAmdMemWrite (
-  IN       ACCESS_WIDTH AccessWidth,
-  IN       UINT64 MemAddress,
-  IN       CONST VOID *Value,
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  )
-{
-
-  switch (AccessWidth) {
-  case AccessWidth8:
-  case AccessS3SaveWidth8:
-    Write64Mem8 (MemAddress, *((UINT8 *) Value));
-    break;
-  case AccessWidth16:
-  case AccessS3SaveWidth16:
-    Write64Mem16 (MemAddress, *((UINT16 *) Value));
-    break;
-  case AccessWidth32:
-  case AccessS3SaveWidth32:
-    Write64Mem32 (MemAddress, *((UINT32 *) Value));
-    break;
-  default:
-    ASSERT (FALSE);
-    break;
-  }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Read PCI config space
- *
- *
- * @param[in] AccessWidth   Access width
- * @param[in] PciAddress    Pci address
- * @param[in] Value         Pointer to data
- * @param[in] StdHeader     Standard configuration header
- *
- */
-VOID
-LibAmdPciRead (
-  IN       ACCESS_WIDTH AccessWidth,
-  IN       PCI_ADDR PciAddress,
-     OUT   VOID *Value,
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  )
-{
-  UINT32 LegacyPciAccess;
-  UINT32 MMIOSize;
-  UINT64 RMWrite;
-  UINT64 RMWritePrevious;
-  UINT64 MMIOAddress;
-
-
-  ASSERT (PciAddress.AddressValue != ILLEGAL_SBDFO);
-  if (!GetPciMmioAddress (&MMIOAddress, &MMIOSize, NULL)) {
-    // We need to convert our "portable" PCI address into a "real" PCI access
-    LegacyPciAccess = ((1 << 31) + (PciAddress.Address.Register & 0xFC) + (PciAddress.Address.Function << 8) + (PciAddress.Address.Device << 11) + (PciAddress.Address.Bus << 16) + ((PciAddress.Address.Register & 0xF00) << (24 - 8)));
-    if (PciAddress.Address.Register <= 0xFF) {
-      LibAmdIoWrite (AccessWidth32, IOCF8, &LegacyPciAccess, NULL);
-      LibAmdIoRead (AccessWidth, IOCFC + (UINT16) (PciAddress.Address.Register & 0x3), Value, NULL);
-    } else {
-      LibAmdMsrRead  (NB_CFG, &RMWritePrevious, NULL);
-      RMWrite = RMWritePrevious | 0x0000400000000000;
-      LibAmdMsrWrite (NB_CFG, &RMWrite, NULL);
-      LibAmdIoWrite (AccessWidth32, IOCF8, &LegacyPciAccess, NULL);
-      LibAmdIoRead (AccessWidth, IOCFC + (UINT16) (PciAddress.Address.Register & 0x3), Value, NULL);
-      LibAmdMsrWrite (NB_CFG, &RMWritePrevious, NULL);
-    }
-    //IDS_HDT_CONSOLE (LIB_PCI_RD, "~PCI RD %08x = %08x\n", LegacyPciAccess, *(UINT32 *)Value);
-  } else {
-    // Setup the MMIO address
-    ASSERT ((MMIOAddress + MMIOSize) > (MMIOAddress + (PciAddress.AddressValue & 0x0FFFFFFF)));
-    MMIOAddress += (PciAddress.AddressValue & 0x0FFFFFFF);
-    LibAmdMemRead (AccessWidth, MMIOAddress, Value, NULL);
-    //IDS_HDT_CONSOLE (LIB_PCI_RD, "~MMIO RD %08x = %08x\n", (UINT32) MMIOAddress, *(UINT32 *)Value);
-  }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Write PCI config space
- *
- *
- * @param[in] AccessWidth   Access width
- * @param[in] PciAddress    Pci address
- * @param[in] Value         Pointer to data
- * @param[in] StdHeader     Standard configuration header
- *
- */
-VOID
-LibAmdPciWrite (
-  IN       ACCESS_WIDTH AccessWidth,
-  IN       PCI_ADDR PciAddress,
-  IN       CONST VOID *Value,
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  )
-{
-  UINT32 LegacyPciAccess;
-  UINT32 MMIOSize;
-  UINT64 RMWrite;
-  UINT64 RMWritePrevious;
-  UINT64 MMIOAddress;
-
-
-  ASSERT (PciAddress.AddressValue != ILLEGAL_SBDFO);
-  if (!GetPciMmioAddress (&MMIOAddress, &MMIOSize, NULL)) {
-    // We need to convert our "portable" PCI address into a "real" PCI access
-    LegacyPciAccess = ((1 << 31) + (PciAddress.Address.Register & 0xFC) + (PciAddress.Address.Function << 8) + (PciAddress.Address.Device << 11) + (PciAddress.Address.Bus << 16) + ((PciAddress.Address.Register & 0xF00) << (24 - 8)));
-    if (PciAddress.Address.Register <= 0xFF) {
-      LibAmdIoWrite (AccessWidth32, IOCF8, &LegacyPciAccess, NULL);
-      LibAmdIoWrite (AccessWidth, IOCFC + (UINT16) (PciAddress.Address.Register & 0x3), Value, NULL);
-    } else {
-      LibAmdMsrRead  (NB_CFG, &RMWritePrevious, NULL);
-      RMWrite = RMWritePrevious | 0x0000400000000000;
-      LibAmdMsrWrite (NB_CFG, &RMWrite, NULL);
-      LibAmdIoWrite (AccessWidth32, IOCF8, &LegacyPciAccess, NULL);
-      LibAmdIoWrite (AccessWidth, IOCFC + (UINT16) (PciAddress.Address.Register & 0x3), Value, NULL);
-      LibAmdMsrWrite (NB_CFG, &RMWritePrevious, NULL);
-    }
-    //IDS_HDT_CONSOLE (LIB_PCI_WR, "~PCI WR %08x = %08x\n", LegacyPciAccess, *(UINT32 *)Value);
-    //printk(BIOS_DEBUG, "~PCI WR %08x = %08x\n", LegacyPciAccess, *(UINT32 *)Value);
-    //printk(BIOS_DEBUG, "LibAmdPciWrite\n");
-  } else {
-    // Setup the MMIO address
-    ASSERT ((MMIOAddress + MMIOSize) > (MMIOAddress + (PciAddress.AddressValue & 0x0FFFFFFF)));
-    MMIOAddress += (PciAddress.AddressValue & 0x0FFFFFFF);
-    LibAmdMemWrite (AccessWidth, MMIOAddress, Value, NULL);
-    //IDS_HDT_CONSOLE (LIB_PCI_WR, "~MMIO WR %08x = %08x\n", (UINT32) MMIOAddress, *(UINT32 *)Value);
-    //printk(BIOS_DEBUG, "~MMIO WR %08x = %08x\n", (UINT32) MMIOAddress, *(UINT32 *)Value);
-    //printk(BIOS_DEBUG, "LibAmdPciWrite mmio\n");
-  }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Get MMIO base address for PCI accesses
- *
- * @param[out] MmioAddress   PCI MMIO base address
- * @param[out] MmioSize      Size of region in bytes
- * @param[in]  StdHeader     Standard configuration header
- *
- * @retval    TRUE          MmioAddress/MmioSize are valid
- */
-BOOLEAN
-STATIC
-GetPciMmioAddress (
-     OUT   UINT64            *MmioAddress,
-     OUT   UINT32            *MmioSize,
-  IN       AMD_CONFIG_PARAMS *StdHeader
-  )
-{
-  BOOLEAN MmioIsEnabled;
-  UINT32  EncodedSize;
-  UINT64  LocalMsrRegister;
-
-  MmioIsEnabled = FALSE;
-  LibAmdMsrRead (MSR_MMIO_Cfg_Base, &LocalMsrRegister, NULL);
-  if ((LocalMsrRegister & BIT0) != 0) {
-    *MmioAddress = LocalMsrRegister & 0xFFFFFFFFFFF00000;
-    EncodedSize = (UINT32) ((LocalMsrRegister & 0x3C) >> 2);
-    *MmioSize = ((1 << EncodedSize) * 0x100000);
-    MmioIsEnabled = TRUE;
-  }
-  return MmioIsEnabled;
-}
diff --git a/src/vendorcode/amd/pi/00670F00/Lib/amdlib.h b/src/vendorcode/amd/pi/00670F00/Lib/amdlib.h
deleted file mode 100644
index fc97213036..0000000000
--- a/src/vendorcode/amd/pi/00670F00/Lib/amdlib.h
+++ /dev/null
@@ -1,202 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * AMD Library
- *
- * Contains interface to the AMD AGESA library
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:      AGESA
- * @e sub-project:  Lib
- * @e \$Revision: 85030 $   @e \$Date: 2012-12-26 00:20:10 -0600 (Wed, 26 Dec 2012) $
- *
- */
-/*
- ******************************************************************************
- *
- * Copyright (c) 2008 - 2013, Advanced Micro Devices, Inc.
- *               2013 - 2014, Sage Electronic Engineering, LLC
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- ******************************************************************************
- **/
-
-#ifndef _AMD_LIB_H_
-#define _AMD_LIB_H_
-
-#include <agesa_headers.h>
-
-#define IOCF8 0xCF8
-#define IOCFC 0xCFC
-
-// Reg Values for ReadCpuReg and WriteCpuReg
-#define    CR4_REG  0x04
-#define    DR0_REG  0x10
-#define    DR1_REG  0x11
-#define    DR2_REG  0x12
-#define    DR3_REG  0x13
-#define    DR7_REG  0x17
-
-// PROTOTYPES FOR amdlib32.asm
-UINT8
-ReadIo8 (
-  IN       UINT16 Address
-  );
-
-UINT16
-ReadIo16 (
-  IN       UINT16 Address
-  );
-
-UINT32
-ReadIo32 (
-  IN       UINT16 Address
-  );
-
-VOID
-WriteIo8 (
-  IN       UINT16 Address,
-  IN       UINT8 Data
-  );
-
-VOID
-WriteIo16 (
-  IN       UINT16 Address,
-  IN       UINT16 Data
-  );
-
-VOID
-WriteIo32 (
-  IN       UINT16 Address,
-  IN       UINT32 Data
-  );
-
-UINT8
-Read64Mem8 (
-  IN       UINT64 Address
-  );
-
-UINT16
-Read64Mem16 (
-  IN       UINT64 Address
-  );
-
-UINT32
-Read64Mem32 (
-  IN       UINT64 Address
-  );
-
-VOID
-Write64Mem8 (
-  IN       UINT64 Address,
-  IN       UINT8 Data
-  );
-
-VOID
-Write64Mem16 (
-  IN       UINT64 Address,
-  IN       UINT16 Data
-  );
-
-VOID
-Write64Mem32 (
-  IN       UINT64 Address,
-  IN       UINT32 Data
-  );
-
-// MSR
-VOID
-LibAmdMsrRead (
-  IN       UINT32 MsrAddress,
-     OUT   UINT64 *Value,
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  );
-
-VOID
-LibAmdMsrWrite (
-  IN       UINT32 MsrAddress,
-  IN       UINT64 *Value,
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  );
-
-// IO
-VOID
-LibAmdIoRead (
-  IN       ACCESS_WIDTH AccessWidth,
-  IN       UINT16 IoAddress,
-     OUT   VOID *Value,
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  );
-
-VOID
-LibAmdIoWrite (
-  IN       ACCESS_WIDTH AccessWidth,
-  IN       UINT16 IoAddress,
-  IN       CONST VOID *Value,
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  );
-
-// Memory or MMIO
-VOID
-LibAmdMemRead (
-  IN       ACCESS_WIDTH AccessWidth,
-  IN       UINT64 MemAddress,
-     OUT   VOID *Value,
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  );
-
-VOID
-LibAmdMemWrite (
-  IN       ACCESS_WIDTH AccessWidth,
-  IN       UINT64 MemAddress,
-  IN       CONST VOID *Value,
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  );
-
-// PCI
-VOID
-LibAmdPciRead (
-  IN       ACCESS_WIDTH AccessWidth,
-  IN       PCI_ADDR PciAddress,
-     OUT   VOID *Value,
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  );
-
-VOID
-LibAmdPciWrite (
-  IN       ACCESS_WIDTH AccessWidth,
-  IN       PCI_ADDR PciAddress,
-  IN       CONST VOID *Value,
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  );
-
-// CPUID
-VOID
-LibAmdCpuidRead (
-  IN       UINT32 CpuidFcnAddress,
-     OUT   CPUID_DATA *Value,
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  );
-#endif // _AMD_LIB_H_
diff --git a/src/vendorcode/amd/pi/00670F00/Proc/Fch/FchPlatform.h b/src/vendorcode/amd/pi/00670F00/Proc/Fch/FchPlatform.h
index 118473cab7..2d5de643c0 100644
--- a/src/vendorcode/amd/pi/00670F00/Proc/Fch/FchPlatform.h
+++ b/src/vendorcode/amd/pi/00670F00/Proc/Fch/FchPlatform.h
@@ -108,7 +108,6 @@
 #endif
 
 #include "Fch.h"
-#include "amdlib.h"
 #include "FchCommonCfg.h"
 #include "AmdFch.h"