summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorSubrata Banik <subrata.banik@intel.com>2019-05-13 12:49:16 +0530
committerSubrata Banik <subrata.banik@intel.com>2019-05-14 06:56:59 +0000
commit55cb5f8de53366c9df10ed9307cc9088c96191cf (patch)
tree10848c3ac922968209bf97227df3f7c0ffa56d70
parent795fda033656982a8aeef0e105bcfbc9a73c8c13 (diff)
downloadcoreboot-55cb5f8de53366c9df10ed9307cc9088c96191cf.tar.xz
Remove unnecessary ENV_RAMSTAGE guard
TEST=Able to build coreboot for CML. Change-Id: Ic0f473e04ffc1de50dee871af52eacf0b328b376 Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32764 Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r--src/arch/x86/include/arch/acpi.h2
-rw-r--r--src/console/post.c2
-rw-r--r--src/drivers/uart/uart8250io.c2
-rw-r--r--src/drivers/uart/uart8250mem.c2
-rw-r--r--src/lib/bootmode.c2
5 files changed, 0 insertions, 10 deletions
diff --git a/src/arch/x86/include/arch/acpi.h b/src/arch/x86/include/arch/acpi.h
index 79feaad070..60efdd0d7a 100644
--- a/src/arch/x86/include/arch/acpi.h
+++ b/src/arch/x86/include/arch/acpi.h
@@ -838,14 +838,12 @@ void acpi_create_ivrs(acpi_ivrs_t *ivrs,
unsigned long (*acpi_fill_ivrs)(acpi_ivrs_t *ivrs_struct,
unsigned long current));
-#if ENV_RAMSTAGE && !defined(__SIMPLE_DEVICE__)
void acpi_create_hpet(acpi_hpet_t *hpet);
unsigned long acpi_write_hpet(struct device *device, unsigned long start,
acpi_rsdp_t *rsdp);
/* cpu/intel/speedstep/acpi.c */
void generate_cpu_entries(struct device *device);
-#endif
void acpi_create_mcfg(acpi_mcfg_t *mcfg);
diff --git a/src/console/post.c b/src/console/post.c
index 236aa8cdaa..b17a819d97 100644
--- a/src/console/post.c
+++ b/src/console/post.c
@@ -44,7 +44,6 @@ void __weak mainboard_post(uint8_t value)
DECLARE_SPIN_LOCK(cmos_post_lock)
-#if ENV_RAMSTAGE
void cmos_post_log(void)
{
u8 code = 0;
@@ -125,7 +124,6 @@ void post_log_clear(void)
post_log_extra(0);
}
#endif /* CONFIG_CMOS_POST_EXTRA */
-#endif /* ENV_RAMSTAGE */
static void cmos_post_code(u8 value)
{
diff --git a/src/drivers/uart/uart8250io.c b/src/drivers/uart/uart8250io.c
index 62671e2b6f..614a849f7a 100644
--- a/src/drivers/uart/uart8250io.c
+++ b/src/drivers/uart/uart8250io.c
@@ -124,7 +124,6 @@ void uart_tx_flush(int idx)
uart8250_tx_flush(uart_platform_base(idx));
}
-#if ENV_RAMSTAGE
void uart_fill_lb(void *data)
{
struct lb_serial serial;
@@ -138,4 +137,3 @@ void uart_fill_lb(void *data)
lb_add_console(LB_TAG_CONSOLE_SERIAL8250, data);
}
-#endif
diff --git a/src/drivers/uart/uart8250mem.c b/src/drivers/uart/uart8250mem.c
index c3dff6a72c..a5aa74a332 100644
--- a/src/drivers/uart/uart8250mem.c
+++ b/src/drivers/uart/uart8250mem.c
@@ -147,7 +147,6 @@ void uart_tx_flush(int idx)
uart8250_mem_tx_flush(base);
}
-#if ENV_RAMSTAGE
void uart_fill_lb(void *data)
{
struct lb_serial serial;
@@ -166,4 +165,3 @@ void uart_fill_lb(void *data)
lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data);
}
-#endif
diff --git a/src/lib/bootmode.c b/src/lib/bootmode.c
index 18f6d5dcac..737dcf93d0 100644
--- a/src/lib/bootmode.c
+++ b/src/lib/bootmode.c
@@ -17,7 +17,6 @@
#include <bootmode.h>
#include <vendorcode/google/chromeos/chromeos.h>
-#if ENV_RAMSTAGE
static int gfx_init_done = -1;
int gfx_get_init_done(void)
@@ -31,7 +30,6 @@ void gfx_set_init_done(int done)
{
gfx_init_done = done;
}
-#endif
int display_init_required(void)
{