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author | Patrick Georgi <pgeorgi@google.com> | 2017-10-26 04:33:47 -0400 |
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committer | Aaron Durbin <adurbin@chromium.org> | 2017-10-26 15:54:19 +0000 |
commit | 66b5acc54bf75b186efea431dfac6eebce527403 (patch) | |
tree | 97e561f0811e1f76456041b6e714c2a16d7d39f4 | |
parent | a547e40992b46a297c0915d3d387514203e9c833 (diff) | |
download | coreboot-66b5acc54bf75b186efea431dfac6eebce527403.tar.xz |
soc/intel/cannonlake: remove duplicate power_state migration
Common PMC code comes with its own.
Change-Id: Ic055f046a2da1c56af4cc7936602d6191ffe7eef
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/22182
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
-rw-r--r-- | src/soc/intel/cannonlake/romstage/power_state.c | 17 |
1 files changed, 0 insertions, 17 deletions
diff --git a/src/soc/intel/cannonlake/romstage/power_state.c b/src/soc/intel/cannonlake/romstage/power_state.c index cd9a3bc76c..b62e5fd4b8 100644 --- a/src/soc/intel/cannonlake/romstage/power_state.c +++ b/src/soc/intel/cannonlake/romstage/power_state.c @@ -32,23 +32,6 @@ int acpi_get_sleep_type(void) return ps->prev_sleep_state; } -static void migrate_power_state(int is_recovery) -{ - struct chipset_power_state *ps_cbmem; - struct chipset_power_state *ps_car; - - ps_car = pmc_get_power_state(); - ps_cbmem = cbmem_add(CBMEM_ID_POWER_STATE, sizeof(*ps_cbmem)); - - if (ps_cbmem == NULL) { - printk(BIOS_DEBUG, "Not adding power state to cbmem!\n"); - return; - } - memcpy(ps_cbmem, ps_car, sizeof(*ps_cbmem)); -} - -ROMSTAGE_CBMEM_INIT_HOOK(migrate_power_state) - static inline int deep_s3_enabled(void) { uint32_t deep_s3_pol; |