{sb/intel/*/azalia.c,device/azalia_device.c}: Reduce differences

Remaining notable differences at function 'codec_detect(u8 *base)'.

Change-Id: Ia64e0ba10f145cf2eae0cb2ff4951b1455963d5d
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44370
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>

6 files changed, 148 insertions, 157 deletions

diff --git a/src/device/azalia_device.c b/src/device/azalia_device.c
index bd35c8e864..279f8a1a0a 100644
--- a/src/device/azalia_device.c
+++ b/src/device/azalia_device.c
@@ -19,9 +19,7 @@ static int set_bits(void *port, u32 mask, u32 val)
 	reg32 |= val;
 	write32(port, reg32);
 
-	/* Wait for readback of register to
-	 * match what was just written to it
-	 */
+	/* Wait for readback of register to match what was just written to it */
 	count = 50;
 	do {
 		/* Wait 1ms based on BKDG wait time */
@@ -42,10 +40,10 @@ static int codec_detect(u8 *base)
 	int count;
 
 	/* Set Bit 0 to 1 to exit reset state (BAR + 0x8)[0] */
-	if (set_bits(base + HDA_GCTL_REG, 1, 1) == -1)
+	if (set_bits(base + HDA_GCTL_REG, 1, HDA_GCTL_CRST) == -1)
 		goto no_codec;
 
-	/* clear STATESTS bits (BAR + 0xE)[2:0] */
+	/* clear STATESTS bits (BAR + 0xe)[2:0] */
 	reg32 = read32(base + HDA_STATESTS_REG);
 	reg32 |= 7;
 	write32(base + HDA_STATESTS_REG, reg32);
@@ -63,12 +61,12 @@ static int codec_detect(u8 *base)
 	if (!count)
 		goto no_codec;
 
-	/* Set Bit0 to 0 to enter reset state (BAR + 0x8)[0] */
+	/* Set Bit 0 to 0 to enter reset state (BAR + 0x8)[0] */
 	if (set_bits(base + HDA_GCTL_REG, 1, 0) == -1)
 		goto no_codec;
 
 	/* Set Bit 0 to 1 to exit reset state (BAR + 0x8)[0] */
-	if (set_bits(base + HDA_GCTL_REG, 1, 1) == -1)
+	if (set_bits(base + HDA_GCTL_REG, 1, HDA_GCTL_CRST) == -1)
 		goto no_codec;
 
 	/* Read in Codec location (BAR + 0xe)[2..0] */
@@ -108,16 +106,14 @@ static u32 find_verb(struct device *dev, u32 viddid, const u32 **verb)
 	return 0;
 }
 
-/**
- *  Wait 50usec for the codec to indicate it is ready
- *  no response would imply that the codec is non-operative
+/*
+ * Wait 50usec for the codec to indicate it is ready.
+ * No response would imply that the codec is non-operative.
  */
 
 static int wait_for_ready(u8 *base)
 {
-	/* Use a 50 usec timeout - the Linux kernel uses the
-	 * same duration */
-
+	/* Use a 50 usec timeout - the Linux kernel uses the same duration */
 	int timeout = 50;
 
 	while (timeout--) {
@@ -130,29 +126,29 @@ static int wait_for_ready(u8 *base)
 	return -1;
 }
 
-/**
- *  Wait 50usec for the codec to indicate that it accepted
- *  the previous command.  No response would imply that the code
- *  is non-operative
+/*
+ * Wait 50usec for the codec to indicate that it accepted the previous command.
+ * No response would imply that the code is non-operative.
  */
 
 static int wait_for_valid(u8 *base)
 {
-	/* Use a 50 usec timeout - the Linux kernel uses the
-	 * same duration */
-
+	u32 reg32;
+	/* Use a 50 usec timeout - the Linux kernel uses the same duration */
 	int timeout = 25;
 
-	write32(base + HDA_ICII_REG,
-		HDA_ICII_VALID | HDA_ICII_BUSY);
+	/* Send the verb to the codec */
+	reg32 = read32(base + HDA_ICII_REG);
+	reg32 |= HDA_ICII_BUSY | HDA_ICII_VALID;
+	write32(base + HDA_ICII_REG, reg32);
+
 	while (timeout--) {
 		udelay(1);
 	}
 	timeout = 50;
 	while (timeout--) {
-		u32 reg32 = read32(base + HDA_ICII_REG);
-		if ((reg32 & (HDA_ICII_VALID | HDA_ICII_BUSY)) ==
-			HDA_ICII_VALID)
+		reg32 = read32(base + HDA_ICII_REG);
+		if ((reg32 & (HDA_ICII_VALID | HDA_ICII_BUSY)) == HDA_ICII_VALID)
 			return 0;
 		udelay(1);
 	}
@@ -170,18 +166,21 @@ static void codec_init(struct device *dev, u8 *base, int addr)
 	printk(BIOS_DEBUG, "azalia_audio: Initializing codec #%d\n", addr);
 
 	/* 1 */
-	if (wait_for_ready(base) == -1)
+	if (wait_for_ready(base) == -1) {
+		printk(BIOS_DEBUG, "  codec not ready.\n");
 		return;
+	}
 
 	reg32 = (addr << 28) | 0x000f0000;
 	write32(base + HDA_IC_REG, reg32);
 
-	if (wait_for_valid(base) == -1)
+	if (wait_for_valid(base) == -1) {
+		printk(BIOS_DEBUG, "  codec not valid.\n");
 		return;
-
-	reg32 = read32(base + HDA_IR_REG);
+	}
 
 	/* 2 */
+	reg32 = read32(base + HDA_IR_REG);
 	printk(BIOS_DEBUG, "azalia_audio: codec viddid: %08x\n", reg32);
 	verb_size = find_verb(dev, reg32, &verb);
 
@@ -220,19 +219,18 @@ void azalia_audio_init(struct device *dev)
 	struct resource *res;
 	u32 codec_mask;
 
-	res = find_resource(dev, 0x10);
+	res = find_resource(dev, PCI_BASE_ADDRESS_0);
 	if (!res)
 		return;
 
-	// NOTE this will break as soon as the azalia_audio get's a bar above
-	// 4G. Is there anything we can do about it?
+	// NOTE this will break as soon as the azalia_audio get's a bar above 4G.
+	// Is there anything we can do about it?
 	base = res2mmio(res, 0, 0);
 	printk(BIOS_DEBUG, "azalia_audio: base = %p\n", base);
 	codec_mask = codec_detect(base);
 
 	if (codec_mask) {
-		printk(BIOS_DEBUG, "azalia_audio: codec_mask = %02x\n",
-		       codec_mask);
+		printk(BIOS_DEBUG, "azalia_audio: codec_mask = %02x\n", codec_mask);
 		codecs_init(dev, base, codec_mask);
 	}
 }
diff --git a/src/southbridge/intel/bd82x6x/azalia.c b/src/southbridge/intel/bd82x6x/azalia.c
index 3d4f7ca7e6..15be4abaef 100644
--- a/src/southbridge/intel/bd82x6x/azalia.c
+++ b/src/southbridge/intel/bd82x6x/azalia.c
@@ -26,9 +26,7 @@ static int set_bits(void *port, u32 mask, u32 val)
 	reg32 |= val;
 	write32(port, reg32);
 
-	/* Wait for readback of register to
-	 * match what was just written to it
-	 */
+	/* Wait for readback of register to match what was just written to it */
 	count = 50;
 	do {
 		/* Wait 1ms based on BKDG wait time */
@@ -48,14 +46,13 @@ static int codec_detect(u8 *base)
 	u8 reg8;
 
 	/* Set Bit 0 to 1 to exit reset state (BAR + 0x8)[0] */
-	if (set_bits(base + HDA_GCTL_REG, 1, 1) == -1)
+	if (set_bits(base + HDA_GCTL_REG, 1, HDA_GCTL_CRST) == -1)
 		goto no_codec;
 
 	/* Write back the value once reset bit is set. */
-	write16(base + HDA_GCAP_REG,
-		read16(base + HDA_GCAP_REG));
+	write16(base + HDA_GCAP_REG, read16(base + HDA_GCAP_REG));
 
-	/* Read in Codec location (BAR + 0xe)[2..0]*/
+	/* Read in Codec location (BAR + 0xe)[2..0] */
 	reg8 = read8(base + HDA_STATESTS_REG);
 	reg8 &= 0x0f;
 	if (!reg8)
@@ -73,15 +70,15 @@ no_codec:
 
 static u32 find_verb(struct device *dev, u32 viddid, const u32 **verb)
 {
-	int idx=0;
+	int idx = 0;
 
 	while (idx < (cim_verb_data_size / sizeof(u32))) {
-		u32 verb_size = 4 * cim_verb_data[idx+2]; // in u32
+		u32 verb_size = 4 * cim_verb_data[idx + 2];	// in u32
 		if (cim_verb_data[idx] != viddid) {
-			idx += verb_size + 3; // skip verb + header
+			idx += verb_size + 3;	// skip verb + header
 			continue;
 		}
-		*verb = &cim_verb_data[idx+3];
+		*verb = &cim_verb_data[idx + 3];
 		return verb_size;
 	}
 
@@ -89,15 +86,14 @@ static u32 find_verb(struct device *dev, u32 viddid, const u32 **verb)
 	return 0;
 }
 
-/**
- *  Wait 50usec for the codec to indicate it is ready
- *  no response would imply that the codec is non-operative
+/*
+ * Wait 50usec for the codec to indicate it is ready.
+ * No response would imply that the codec is non-operative.
  */
 
 static int wait_for_ready(u8 *base)
 {
 	/* Use a 1msec timeout */
-
 	int timeout = 1000;
 
 	while (timeout--) {
@@ -110,28 +106,25 @@ static int wait_for_ready(u8 *base)
 	return -1;
 }
 
-/**
- *  Wait 50usec for the codec to indicate that it accepted
- *  the previous command.  No response would imply that the code
- *  is non-operative
+/*
+ * Wait 50usec for the codec to indicate that it accepted the previous command.
+ * No response would imply that the code is non-operative.
  */
 
 static int wait_for_valid(u8 *base)
 {
 	u32 reg32;
+	/* Use a 1msec timeout */
+	int timeout = 1000;
 
 	/* Send the verb to the codec */
 	reg32 = read32(base + HDA_ICII_REG);
 	reg32 |= HDA_ICII_BUSY | HDA_ICII_VALID;
 	write32(base + HDA_ICII_REG, reg32);
 
-	/* Use a 1msec timeout */
-
-	int timeout = 1000;
 	while (timeout--) {
 		reg32 = read32(base + HDA_ICII_REG);
-		if ((reg32 & (HDA_ICII_VALID | HDA_ICII_BUSY)) ==
-			HDA_ICII_VALID)
+		if ((reg32 & (HDA_ICII_VALID | HDA_ICII_BUSY)) == HDA_ICII_VALID)
 			return 0;
 		udelay(1);
 	}
@@ -162,9 +155,8 @@ static void codec_init(struct device *dev, u8 *base, int addr)
 		return;
 	}
 
-	reg32 = read32(base + HDA_IR_REG);
-
 	/* 2 */
+	reg32 = read32(base + HDA_IR_REG);
 	printk(BIOS_DEBUG, "Azalia: codec viddid: %08x\n", reg32);
 	verb_size = find_verb(dev, reg32, &verb);
 
@@ -213,13 +205,12 @@ static void azalia_init(struct device *dev)
 	u32 codec_mask;
 	u32 reg32;
 
-	/* Find base address */
 	res = find_resource(dev, PCI_BASE_ADDRESS_0);
 	if (!res)
 		return;
 
-	// NOTE this will break as soon as the Azalia get's a bar above
-	// 4G. Is there anything we can do about it?
+	// NOTE this will break as soon as the Azalia get's a bar above 4G.
+	// Is there anything we can do about it?
 	base = res2mmio(res, 0, 0);
 	printk(BIOS_DEBUG, "Azalia: base = %08x\n", (u32)base);
 
diff --git a/src/southbridge/intel/i82801gx/azalia.c b/src/southbridge/intel/i82801gx/azalia.c
index add906962b..99582b41d6 100644
--- a/src/southbridge/intel/i82801gx/azalia.c
+++ b/src/southbridge/intel/i82801gx/azalia.c
@@ -42,15 +42,15 @@ static int codec_detect(u8 *base)
 {
 	u32 reg32;
 
-	/* Set Bit0 to 0 to enter reset state (BAR + 0x8)[0] */
+	/* Set Bit 0 to 0 to enter reset state (BAR + 0x8)[0] */
 	if (set_bits(base + HDA_GCTL_REG, 1, 0) == -1)
 		goto no_codec;
 
 	/* Set Bit 0 to 1 to exit reset state (BAR + 0x8)[0] */
-	if (set_bits(base + HDA_GCTL_REG, 1, 1) == -1)
+	if (set_bits(base + HDA_GCTL_REG, 1, HDA_GCTL_CRST) == -1)
 		goto no_codec;
 
-	/* Read in Codec location (BAR + 0xe)[2..0]*/
+	/* Read in Codec location (BAR + 0xe)[2..0] */
 	reg32 = read32(base + HDA_STATESTS_REG);
 	reg32 &= 0x0f;
 	if (!reg32)
@@ -71,12 +71,12 @@ static u32 find_verb(struct device *dev, u32 viddid, const u32 **verb)
 	int idx = 0;
 
 	while (idx < (cim_verb_data_size / sizeof(u32))) {
-		u32 verb_size = 4 * cim_verb_data[idx+2]; // in u32
+		u32 verb_size = 4 * cim_verb_data[idx + 2];	// in u32
 		if (cim_verb_data[idx] != viddid) {
-			idx += verb_size + 3; // skip verb + header
+			idx += verb_size + 3;	// skip verb + header
 			continue;
 		}
-		*verb = &cim_verb_data[idx+3];
+		*verb = &cim_verb_data[idx + 3];
 		return verb_size;
 	}
 
@@ -84,9 +84,9 @@ static u32 find_verb(struct device *dev, u32 viddid, const u32 **verb)
 	return 0;
 }
 
-/**
- *  Wait 50usec for the codec to indicate it is ready
- *  no response would imply that the codec is non-operative
+/*
+ * Wait 50usec for the codec to indicate it is ready.
+ * No response would imply that the codec is non-operative.
  */
 
 static int wait_for_ready(u8 *base)
@@ -104,23 +104,22 @@ static int wait_for_ready(u8 *base)
 	return -1;
 }
 
-/**
- *  Wait 50usec for the codec to indicate that it accepted the previous command.
- *  No response would imply that the code is non-operative.
+/*
+ * Wait 50usec for the codec to indicate that it accepted the previous command.
+ * No response would imply that the code is non-operative.
  */
 
 static int wait_for_valid(u8 *base)
 {
 	u32 reg32;
+	/* Use a 50 usec timeout - the Linux kernel uses the same duration */
+	int timeout = 50;
 
 	/* Send the verb to the codec */
 	reg32 = read32(base + HDA_ICII_REG);
 	reg32 |= HDA_ICII_BUSY | HDA_ICII_VALID;
 	write32(base + HDA_ICII_REG, reg32);
 
-	/* Use a 50 usec timeout - the Linux kernel uses the same duration */
-
-	int timeout = 50;
 	while (timeout--) {
 		reg32 = read32(base + HDA_ICII_REG);
 		if ((reg32 & (HDA_ICII_VALID | HDA_ICII_BUSY)) == HDA_ICII_VALID)
@@ -141,18 +140,21 @@ static void codec_init(struct device *dev, u8 *base, int addr)
 	printk(BIOS_DEBUG, "Azalia: Initializing codec #%d\n", addr);
 
 	/* 1 */
-	if (wait_for_ready(base) == -1)
+	if (wait_for_ready(base) == -1) {
+		printk(BIOS_DEBUG, "  codec not ready.\n");
 		return;
+	}
 
 	reg32 = (addr << 28) | 0x000f0000;
 	write32(base + HDA_IC_REG, reg32);
 
-	if (wait_for_valid(base) == -1)
+	if (wait_for_valid(base) == -1) {
+		printk(BIOS_DEBUG, "  codec not valid.\n");
 		return;
-
-	reg32 = read32(base + HDA_IR_REG);
+	}
 
 	/* 2 */
+	reg32 = read32(base + HDA_IR_REG);
 	printk(BIOS_DEBUG, "Azalia: codec viddid: %08x\n", reg32);
 	verb_size = find_verb(dev, reg32, &verb);
 
@@ -178,6 +180,7 @@ static void codec_init(struct device *dev, u8 *base, int addr)
 static void codecs_init(struct device *dev, u8 *base, u32 codec_mask)
 {
 	int i;
+
 	for (i = 2; i >= 0; i--) {
 		if (codec_mask & (1 << i))
 			codec_init(dev, base, i);
@@ -230,12 +233,12 @@ static void azalia_init(struct device *dev)
 	// Docking not supported
 	pci_and_config8(dev, 0x4d, (u8)~(1 << 7)); // Docking Status
 
-	res = find_resource(dev, 0x10);
+	res = find_resource(dev, PCI_BASE_ADDRESS_0);
 	if (!res)
 		return;
 
-	// NOTE this will break as soon as the Azalia get's a bar above
-	// 4G. Is there anything we can do about it?
+	// NOTE this will break as soon as the Azalia get's a bar above 4G.
+	// Is there anything we can do about it?
 	base = res2mmio(res, 0, 0);
 	printk(BIOS_DEBUG, "Azalia: base = %08x\n", (u32)base);
 	codec_mask = codec_detect(base);
diff --git a/src/southbridge/intel/i82801ix/azalia.c b/src/southbridge/intel/i82801ix/azalia.c
index f0c00b674e..1d1405ea46 100644
--- a/src/southbridge/intel/i82801ix/azalia.c
+++ b/src/southbridge/intel/i82801ix/azalia.c
@@ -42,15 +42,15 @@ static int codec_detect(u8 *base)
 {
 	u32 reg32;
 
-	/* Set Bit0 to 0 to enter reset state (BAR + 0x8)[0] */
+	/* Set Bit 0 to 0 to enter reset state (BAR + 0x8)[0] */
 	if (set_bits(base + HDA_GCTL_REG, 1, 0) == -1)
 		goto no_codec;
 
 	/* Set Bit 0 to 1 to exit reset state (BAR + 0x8)[0] */
-	if (set_bits(base + HDA_GCTL_REG, 1, 1) == -1)
+	if (set_bits(base + HDA_GCTL_REG, 1, HDA_GCTL_CRST) == -1)
 		goto no_codec;
 
-	/* Read in Codec location (BAR + 0xe)[2..0]*/
+	/* Read in Codec location (BAR + 0xe)[2..0] */
 	reg32 = read32(base + HDA_STATESTS_REG);
 	reg32 &= 0x0f;
 	if (!reg32)
@@ -71,12 +71,12 @@ static u32 find_verb(struct device *dev, u32 viddid, const u32 **verb)
 	int idx = 0;
 
 	while (idx < (cim_verb_data_size / sizeof(u32))) {
-		u32 verb_size = 4 * cim_verb_data[idx+2]; // in u32
+		u32 verb_size = 4 * cim_verb_data[idx + 2];	// in u32
 		if (cim_verb_data[idx] != viddid) {
-			idx += verb_size + 3; // skip verb + header
+			idx += verb_size + 3;	// skip verb + header
 			continue;
 		}
-		*verb = &cim_verb_data[idx+3];
+		*verb = &cim_verb_data[idx + 3];
 		return verb_size;
 	}
 
@@ -84,9 +84,9 @@ static u32 find_verb(struct device *dev, u32 viddid, const u32 **verb)
 	return 0;
 }
 
-/**
- *  Wait 50usec for the codec to indicate it is ready
- *  no response would imply that the codec is non-operative
+/*
+ * Wait 50usec for the codec to indicate it is ready.
+ * No response would imply that the codec is non-operative.
  */
 
 static int wait_for_ready(u8 *base)
@@ -104,23 +104,22 @@ static int wait_for_ready(u8 *base)
 	return -1;
 }
 
-/**
- *  Wait 50usec for the codec to indicate that it accepted the previous command.
- *  No response would imply that the code is non-operative.
+/*
+ * Wait 50usec for the codec to indicate that it accepted the previous command.
+ * No response would imply that the code is non-operative.
  */
 
 static int wait_for_valid(u8 *base)
 {
 	u32 reg32;
+	/* Use a 50 usec timeout - the Linux kernel uses the same duration */
+	int timeout = 50;
 
 	/* Send the verb to the codec */
 	reg32 = read32(base + HDA_ICII_REG);
 	reg32 |= HDA_ICII_BUSY | HDA_ICII_VALID;
 	write32(base + HDA_ICII_REG, reg32);
 
-	/* Use a 50 usec timeout - the Linux kernel uses the same duration */
-
-	int timeout = 50;
 	while (timeout--) {
 		reg32 = read32(base + HDA_ICII_REG);
 		if ((reg32 & (HDA_ICII_VALID | HDA_ICII_BUSY)) == HDA_ICII_VALID)
@@ -141,18 +140,21 @@ static void codec_init(struct device *dev, u8 *base, int addr)
 	printk(BIOS_DEBUG, "Azalia: Initializing codec #%d\n", addr);
 
 	/* 1 */
-	if (wait_for_ready(base) == -1)
+	if (wait_for_ready(base) == -1) {
+		printk(BIOS_DEBUG, "  codec not ready.\n");
 		return;
+	}
 
 	reg32 = (addr << 28) | 0x000f0000;
 	write32(base + HDA_IC_REG, reg32);
 
-	if (wait_for_valid(base) == -1)
+	if (wait_for_valid(base) == -1) {
+		printk(BIOS_DEBUG, "  codec not valid.\n");
 		return;
-
-	reg32 = read32(base + HDA_IR_REG);
+	}
 
 	/* 2 */
+	reg32 = read32(base + HDA_IR_REG);
 	printk(BIOS_DEBUG, "Azalia: codec viddid: %08x\n", reg32);
 	verb_size = find_verb(dev, reg32, &verb);
 
@@ -178,6 +180,7 @@ static void codec_init(struct device *dev, u8 *base, int addr)
 static void codecs_init(struct device *dev, u8 *base, u32 codec_mask)
 {
 	int i;
+
 	for (i = 2; i >= 0; i--) {
 		if (codec_mask & (1 << i))
 			codec_init(dev, base, i);
@@ -224,12 +227,12 @@ static void azalia_init(struct device *dev)
 	/* Lock some R/WO bits by writing their current value. */
 	pci_update_config32(dev, 0x74, ~0, 0);
 
-	res = find_resource(dev, 0x10);
+	res = find_resource(dev, PCI_BASE_ADDRESS_0);
 	if (!res)
 		return;
 
-	// NOTE this will break as soon as the Azalia get's a bar above
-	// 4G. Is there anything we can do about it?
+	// NOTE this will break as soon as the Azalia get's a bar above 4G.
+	// Is there anything we can do about it?
 	base = res2mmio(res, 0, 0);
 	printk(BIOS_DEBUG, "Azalia: base = %p\n", base);
 	codec_mask = codec_detect(base);
diff --git a/src/southbridge/intel/i82801jx/azalia.c b/src/southbridge/intel/i82801jx/azalia.c
index b53d6415f8..3fa344dd38 100644
--- a/src/southbridge/intel/i82801jx/azalia.c
+++ b/src/southbridge/intel/i82801jx/azalia.c
@@ -42,15 +42,15 @@ static int codec_detect(u8 *base)
 {
 	u32 reg32;
 
-	/* Set Bit0 to 0 to enter reset state (BAR + 0x8)[0] */
+	/* Set Bit 0 to 0 to enter reset state (BAR + 0x8)[0] */
 	if (set_bits(base + HDA_GCTL_REG, 1, 0) == -1)
 		goto no_codec;
 
 	/* Set Bit 0 to 1 to exit reset state (BAR + 0x8)[0] */
-	if (set_bits(base + HDA_GCTL_REG, 1, 1) == -1)
+	if (set_bits(base + HDA_GCTL_REG, 1, HDA_GCTL_CRST) == -1)
 		goto no_codec;
 
-	/* Read in Codec location (BAR + 0xe)[2..0]*/
+	/* Read in Codec location (BAR + 0xe)[2..0] */
 	reg32 = read32(base + HDA_STATESTS_REG);
 	reg32 &= 0x0f;
 	if (!reg32)
@@ -71,12 +71,12 @@ static u32 find_verb(struct device *dev, u32 viddid, const u32 **verb)
 	int idx = 0;
 
 	while (idx < (cim_verb_data_size / sizeof(u32))) {
-		u32 verb_size = 4 * cim_verb_data[idx+2]; // in u32
+		u32 verb_size = 4 * cim_verb_data[idx + 2];	// in u32
 		if (cim_verb_data[idx] != viddid) {
-			idx += verb_size + 3; // skip verb + header
+			idx += verb_size + 3;	// skip verb + header
 			continue;
 		}
-		*verb = &cim_verb_data[idx+3];
+		*verb = &cim_verb_data[idx + 3];
 		return verb_size;
 	}
 
@@ -84,9 +84,9 @@ static u32 find_verb(struct device *dev, u32 viddid, const u32 **verb)
 	return 0;
 }
 
-/**
- *  Wait 50usec for the codec to indicate it is ready
- *  no response would imply that the codec is non-operative
+/*
+ * Wait 50usec for the codec to indicate it is ready.
+ * No response would imply that the codec is non-operative.
  */
 
 static int wait_for_ready(u8 *base)
@@ -104,23 +104,22 @@ static int wait_for_ready(u8 *base)
 	return -1;
 }
 
-/**
- *  Wait 50usec for the codec to indicate that it accepted the previous command.
- *  No response would imply that the code is non-operative.
+/*
+ * Wait 50usec for the codec to indicate that it accepted the previous command.
+ * No response would imply that the code is non-operative.
  */
 
 static int wait_for_valid(u8 *base)
 {
 	u32 reg32;
+	/* Use a 50 usec timeout - the Linux kernel uses the same duration */
+	int timeout = 50;
 
 	/* Send the verb to the codec */
 	reg32 = read32(base + HDA_ICII_REG);
 	reg32 |= HDA_ICII_BUSY | HDA_ICII_VALID;
 	write32(base + HDA_ICII_REG, reg32);
 
-	/* Use a 50 usec timeout - the Linux kernel uses the same duration */
-
-	int timeout = 50;
 	while (timeout--) {
 		reg32 = read32(base + HDA_ICII_REG);
 		if ((reg32 & (HDA_ICII_VALID | HDA_ICII_BUSY)) == HDA_ICII_VALID)
@@ -141,18 +140,21 @@ static void codec_init(struct device *dev, u8 *base, int addr)
 	printk(BIOS_DEBUG, "Azalia: Initializing codec #%d\n", addr);
 
 	/* 1 */
-	if (wait_for_ready(base) == -1)
+	if (wait_for_ready(base) == -1) {
+		printk(BIOS_DEBUG, "  codec not ready.\n");
 		return;
+	}
 
 	reg32 = (addr << 28) | 0x000f0000;
 	write32(base + HDA_IC_REG, reg32);
 
-	if (wait_for_valid(base) == -1)
+	if (wait_for_valid(base) == -1) {
+		printk(BIOS_DEBUG, "  codec not valid.\n");
 		return;
-
-	reg32 = read32(base + HDA_IR_REG);
+	}
 
 	/* 2 */
+	reg32 = read32(base + HDA_IR_REG);
 	printk(BIOS_DEBUG, "Azalia: codec viddid: %08x\n", reg32);
 	verb_size = find_verb(dev, reg32, &verb);
 
@@ -178,6 +180,7 @@ static void codec_init(struct device *dev, u8 *base, int addr)
 static void codecs_init(struct device *dev, u8 *base, u32 codec_mask)
 {
 	int i;
+
 	for (i = 2; i >= 0; i--) {
 		if (codec_mask & (1 << i))
 			codec_init(dev, base, i);
@@ -224,12 +227,12 @@ static void azalia_init(struct device *dev)
 	/* Lock some R/WO bits by writing their current value. */
 	pci_update_config32(dev, 0x74, ~0, 0);
 
-	res = find_resource(dev, 0x10);
+	res = find_resource(dev, PCI_BASE_ADDRESS_0);
 	if (!res)
 		return;
 
-	// NOTE this will break as soon as the Azalia get's a bar above
-	// 4G. Is there anything we can do about it?
+	// NOTE this will break as soon as the Azalia get's a bar above 4G.
+	// Is there anything we can do about it?
 	base = res2mmio(res, 0, 0);
 	printk(BIOS_DEBUG, "Azalia: base = %p\n", base);
 	codec_mask = codec_detect(base);
diff --git a/src/southbridge/intel/ibexpeak/azalia.c b/src/southbridge/intel/ibexpeak/azalia.c
index 47d595c2a1..f686514310 100644
--- a/src/southbridge/intel/ibexpeak/azalia.c
+++ b/src/southbridge/intel/ibexpeak/azalia.c
@@ -22,9 +22,7 @@ static int set_bits(void *port, u32 mask, u32 val)
 	reg32 |= val;
 	write32(port, reg32);
 
-	/* Wait for readback of register to
-	 * match what was just written to it
-	 */
+	/* Wait for readback of register to match what was just written to it */
 	count = 50;
 	do {
 		/* Wait 1ms based on BKDG wait time */
@@ -44,14 +42,13 @@ static int codec_detect(u8 *base)
 	u8 reg8;
 
 	/* Set Bit 0 to 1 to exit reset state (BAR + 0x8)[0] */
-	if (set_bits(base + HDA_GCTL_REG, 1, 1) == -1)
+	if (set_bits(base + HDA_GCTL_REG, 1, HDA_GCTL_CRST) == -1)
 		goto no_codec;
 
 	/* Write back the value once reset bit is set. */
-	write16(base + HDA_GCAP_REG,
-		read16(base + HDA_GCAP_REG));
+	write16(base + HDA_GCAP_REG, read16(base + HDA_GCAP_REG));
 
-	/* Read in Codec location (BAR + 0xe)[2..0]*/
+	/* Read in Codec location (BAR + 0xe)[2..0] */
 	reg8 = read8(base + HDA_STATESTS_REG);
 	reg8 &= 0x0f;
 	if (!reg8)
@@ -69,15 +66,15 @@ no_codec:
 
 static u32 find_verb(struct device *dev, u32 viddid, const u32 **verb)
 {
-	int idx=0;
+	int idx = 0;
 
 	while (idx < (cim_verb_data_size / sizeof(u32))) {
-		u32 verb_size = 4 * cim_verb_data[idx+2]; // in u32
+		u32 verb_size = 4 * cim_verb_data[idx + 2];	// in u32
 		if (cim_verb_data[idx] != viddid) {
-			idx += verb_size + 3; // skip verb + header
+			idx += verb_size + 3;	// skip verb + header
 			continue;
 		}
-		*verb = &cim_verb_data[idx+3];
+		*verb = &cim_verb_data[idx + 3];
 		return verb_size;
 	}
 
@@ -85,15 +82,14 @@ static u32 find_verb(struct device *dev, u32 viddid, const u32 **verb)
 	return 0;
 }
 
-/**
- *  Wait 50usec for the codec to indicate it is ready
- *  no response would imply that the codec is non-operative
+/*
+ * Wait 50usec for the codec to indicate it is ready.
+ * No response would imply that the codec is non-operative.
  */
 
 static int wait_for_ready(u8 *base)
 {
 	/* Use a 1msec timeout */
-
 	int timeout = 1000;
 
 	while (timeout--) {
@@ -106,28 +102,25 @@ static int wait_for_ready(u8 *base)
 	return -1;
 }
 
-/**
- *  Wait 50usec for the codec to indicate that it accepted
- *  the previous command.  No response would imply that the code
- *  is non-operative
+/*
+ * Wait 50usec for the codec to indicate that it accepted the previous command.
+ * No response would imply that the code is non-operative.
  */
 
 static int wait_for_valid(u8 *base)
 {
 	u32 reg32;
+	/* Use a 1msec timeout */
+	int timeout = 1000;
 
 	/* Send the verb to the codec */
 	reg32 = read32(base + HDA_ICII_REG);
 	reg32 |= HDA_ICII_BUSY | HDA_ICII_VALID;
 	write32(base + HDA_ICII_REG, reg32);
 
-	/* Use a 1msec timeout */
-
-	int timeout = 1000;
 	while (timeout--) {
 		reg32 = read32(base + HDA_ICII_REG);
-		if ((reg32 & (HDA_ICII_VALID | HDA_ICII_BUSY)) ==
-			HDA_ICII_VALID)
+		if ((reg32 & (HDA_ICII_VALID | HDA_ICII_BUSY)) == HDA_ICII_VALID)
 			return 0;
 		udelay(1);
 	}
@@ -158,9 +151,8 @@ static void codec_init(struct device *dev, u8 *base, int addr)
 		return;
 	}
 
-	reg32 = read32(base + HDA_IR_REG);
-
 	/* 2 */
+	reg32 = read32(base + HDA_IR_REG);
 	printk(BIOS_DEBUG, "Azalia: codec viddid: %08x\n", reg32);
 	verb_size = find_verb(dev, reg32, &verb);
 
@@ -186,6 +178,7 @@ static void codec_init(struct device *dev, u8 *base, int addr)
 static void codecs_init(struct device *dev, u8 *base, u32 codec_mask)
 {
 	int i;
+
 	for (i = 3; i >= 0; i--) {
 		if (codec_mask & (1 << i))
 			codec_init(dev, base, i);
@@ -216,8 +209,8 @@ static void azalia_init(struct device *dev)
 	if (!res)
 		return;
 
-	// NOTE this will break as soon as the Azalia get's a bar above
-	// 4G. Is there anything we can do about it?
+	// NOTE this will break as soon as the Azalia get's a bar above 4G.
+	// Is there anything we can do about it?
 	base = res2mmio(res, 0, 0);
 	printk(BIOS_DEBUG, "Azalia: base = %08x\n", (u32)base);