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author | Ronald G. Minnich <rminnich@gmail.com> | 2006-06-27 02:26:06 +0000 |
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committer | Ronald G. Minnich <rminnich@gmail.com> | 2006-06-27 02:26:06 +0000 |
commit | 707097fc1ccf86373e38706adfdd0f648e89c51b (patch) | |
tree | dce9b4fffd8cb218c3295de5f17a9c26a955b208 | |
parent | aad235e9069ec1fd855a88b149520ba4d4b67a10 (diff) | |
download | coreboot-707097fc1ccf86373e38706adfdd0f648e89c51b.tar.xz |
fix interrupt for f5 (ehci)
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2335 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
-rw-r--r-- | src/mainboard/olpc/rev_a/Config.lb | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/olpc/rev_a/Config.lb b/src/mainboard/olpc/rev_a/Config.lb index 865543a047..db80ccd02a 100644 --- a/src/mainboard/olpc/rev_a/Config.lb +++ b/src/mainboard/olpc/rev_a/Config.lb @@ -139,7 +139,7 @@ chip northbridge/amd/gx2 register "enable_uarta" = "1" register "audio_irq" = "5" register "usbf4_irq" = "10" - register "usbf5_irq" = "0" + register "usbf5_irq" = "10" register "usbf6_irq" = "0" register "usbf7_irq" = "0" device pci d.0 on end # Realtek 8139 LAN |