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| author | Michael Niewöhner <foss@mniewoehner.de> | 2020-03-13 21:15:55 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2020-03-16 22:38:31 +0000 |
| commit | 8676c268a033f997e4859fd7608d281f00937c8a (patch) | |
| tree | 5c00fc7ef7961de0f81a3d250520f4f51e23ee1c | |
| parent | 3c78445ad938ee1241f570b9fb1560e66f3e6438 (diff) | |
| download | coreboot-8676c268a033f997e4859fd7608d281f00937c8a.tar.xz | |
util/inteltool: ahci: rework AHCI
Rework AHCI to align the code with the rest of inteltool.
Change-Id: I37116f8e269d0376e147dd6de7365c45ac90bda0
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39504
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
| -rw-r--r-- | util/inteltool/ahci.c | 37 |
1 files changed, 19 insertions, 18 deletions
diff --git a/util/inteltool/ahci.c b/util/inteltool/ahci.c index 22a5b011ed..09f6427ee4 100644 --- a/util/inteltool/ahci.c +++ b/util/inteltool/ahci.c @@ -59,7 +59,7 @@ static void print_port(const uint8_t *const mmio, size_t port) int print_ahci(struct pci_dev *ahci) { - size_t mmio_size, i; + size_t ahci_registers_size = 0, i; if (!ahci) { puts("No SATA device found"); @@ -67,15 +67,19 @@ int print_ahci(struct pci_dev *ahci) } printf("\n============= AHCI Registers ==============\n\n"); - if (ahci->device_id == PCI_DEVICE_ID_INTEL_SUNRISEPOINT_SATA || - ahci->device_id == PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_SATA) - mmio_size = 0x800; - else - mmio_size = 0x400; + switch (ahci->device_id) { + case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_SATA: + case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_SATA: + ahci_registers_size = 0x800; + break; + default: + ahci_registers_size = 0x400; + } - const pciaddr_t mmio_phys = ahci->base_addr[5] & ~0x7ULL; - printf("ABAR = 0x%08llx (MEM)\n\n", (unsigned long long)mmio_phys); - const uint8_t *const mmio = map_physical(mmio_phys, mmio_size); + const pciaddr_t ahci_phys = ahci->base_addr[5] & ~0x7ULL; + printf("\n============= ABAR ==============\n\n"); + printf("ABAR = 0x%08llx (MEM)\n\n", (unsigned long long)ahci_phys); + const uint8_t *const mmio = map_physical(ahci_phys, ahci_registers_size); if (mmio == NULL) { perror("Error mapping MMIO"); exit(1); @@ -91,21 +95,18 @@ int print_ahci(struct pci_dev *ahci) } } - const size_t max_ports = (mmio_size - 0x100) / 0x80; + const size_t max_ports = (ahci_registers_size - 0x100) / 0x80; for (i = 0; i < max_ports; i++) { if (MMIO(0x0c) & 1 << i) print_port(mmio, i); } - if (ahci->device_id == PCI_DEVICE_ID_INTEL_SUNRISEPOINT_SATA || - ahci->device_id == PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_SATA) { - puts("\nOther registers:"); - for (i = 0x500; i < mmio_size; i += 4) { - if (MMIO(i)) - printf("0x%03zx: 0x%08x\n", i, MMIO(i)); - } + puts("\nOther registers:"); + for (i = 0x500; i < ahci_registers_size; i += 4) { + if (MMIO(i)) + printf("0x%03zx: 0x%08x\n", i, MMIO(i)); } - unmap_physical((void *)mmio, mmio_size); + unmap_physical((void *)mmio, ahci_registers_size); return 0; } |