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authorUwe Hermann <uwe@hermann-uwe.de>2010-11-21 10:26:04 +0000
committerUwe Hermann <uwe@hermann-uwe.de>2010-11-21 10:26:04 +0000
commit86a571797d9ede9d79edcfdce38f50a80b9a49f9 (patch)
treedf4da1a8d697f25f1ab201cae7518680f370d0eb
parent26535d6e28b9c6697ff2865ba0fd6b2b63054f24 (diff)
downloadcoreboot-86a571797d9ede9d79edcfdce38f50a80b9a49f9.tar.xz
Build fix.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6102 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
-rw-r--r--src/mainboard/tyan/s2912_fam10/romstage.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mainboard/tyan/s2912_fam10/romstage.c b/src/mainboard/tyan/s2912_fam10/romstage.c
index 5963d18d67..a3ffff902e 100644
--- a/src/mainboard/tyan/s2912_fam10/romstage.c
+++ b/src/mainboard/tyan/s2912_fam10/romstage.c
@@ -128,6 +128,7 @@ static const u8 spd_addr[] = {
//second node
RC00, DIMM4, DIMM6, 0, 0, DIMM5, DIMM7, 0, 0,
#endif
+};
void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
{