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authorTobias Diedrich <ranma+coreboot@tdiedrich.de>2010-11-17 10:58:13 +0000
committerRudolf Marek <r.marek@assembler.cz>2010-11-17 10:58:13 +0000
commit8a71dcd3212fb438ffd725f4b09fa1bb831ee904 (patch)
tree3e6ff1501f96f93b8f7092c19b63a76e852f2c9b
parent2b6e93bd7ad11e7553e6cd220e1a5038930b09cb (diff)
downloadcoreboot-8a71dcd3212fb438ffd725f4b09fa1bb831ee904.tar.xz
The only southbridge having a pirq_assign_irqs function (needed for
CONFIG_PIRQ_ROUTE) so far is the amd cs5530. Add one for vt8237 too. Setting up the pci routing is important in case you want to boot DOS, OSes that don't support ACPI or MP tables and ROMs for add-in storage controllers may depend on this too. TODO: Fix the 4 routing links limitation in src/arch/i386/boot/pirq_routing.c Signed-off-by: Tobias Diedrich <ranma+coreboot@tdiedrich.de> Acked-by: Rudolf Marek <r.marek@assembler.cz> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6081 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
-rw-r--r--src/mainboard/asus/m2v/Kconfig1
-rw-r--r--src/southbridge/via/vt8237r/Makefile.inc2
-rw-r--r--src/southbridge/via/vt8237r/vt8237r_pirq.c51
3 files changed, 53 insertions, 1 deletions
diff --git a/src/mainboard/asus/m2v/Kconfig b/src/mainboard/asus/m2v/Kconfig
index f842455192..aced403f2d 100644
--- a/src/mainboard/asus/m2v/Kconfig
+++ b/src/mainboard/asus/m2v/Kconfig
@@ -18,6 +18,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select RAMINIT_SYSINFO
select TINY_BOOTBLOCK
select HAVE_PIRQ_TABLE
+ select PIRQ_ROUTE
select HAVE_ACPI_TABLES
select HAVE_MP_TABLE
select SET_FIDVID
diff --git a/src/southbridge/via/vt8237r/Makefile.inc b/src/southbridge/via/vt8237r/Makefile.inc
index 8a1efa5951..04adb4b6d9 100644
--- a/src/southbridge/via/vt8237r/Makefile.inc
+++ b/src/southbridge/via/vt8237r/Makefile.inc
@@ -23,5 +23,5 @@ driver-y += vt8237r_ide.c
driver-y += vt8237r_lpc.c
driver-y += vt8237r_sata.c
driver-y += vt8237r_usb.c
-driver-y += vt8237r_nic.c
+driver-$(CONFIG_PIRQ_ROUTE) += vt8237r_pirq.c
ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += vt8237_fadt.c
diff --git a/src/southbridge/via/vt8237r/vt8237r_pirq.c b/src/southbridge/via/vt8237r/vt8237r_pirq.c
new file mode 100644
index 0000000000..9915da4835
--- /dev/null
+++ b/src/southbridge/via/vt8237r/vt8237r_pirq.c
@@ -0,0 +1,51 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2007 Nikolay Petukhov <nikolay.petukhov@gmail.com>
+ * Copyright (C) 2010 Tobias Diedrich <ranma+coreboot@tdiedrich.de>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#include <arch/pirq_routing.h>
+#include <console/console.h>
+#include <device/pci.h>
+#include <device/pci_ids.h>
+#include <pc80/i8259.h>
+
+#if (CONFIG_PIRQ_ROUTE==1 && CONFIG_GENERATE_PIRQ_TABLE==1)
+void pirq_assign_irqs(const unsigned char route[4])
+{
+ device_t pdev;
+
+ pdev = dev_find_device(PCI_VENDOR_ID_VIA,
+ PCI_DEVICE_ID_VIA_VT8237R_LPC, 0);
+ if (!pdev)
+ pdev = dev_find_device(PCI_VENDOR_ID_VIA,
+ PCI_DEVICE_ID_VIA_VT8237S_LPC, 0);
+ if (!pdev)
+ pdev = dev_find_device(PCI_VENDOR_ID_VIA,
+ PCI_DEVICE_ID_VIA_VT8237A_LPC, 0);
+ if (!pdev)
+ return;
+
+ pci_write_config8(pdev, 0x55, route[0] << 4);
+ pci_write_config8(pdev, 0x56, (route[2] << 4) | route[1]);
+ pci_write_config8(pdev, 0x57, route[3] << 4);
+
+ /* Enable INT[E-H] mapped to INT[A-D] for simplicity */
+ pci_write_config8(pdev, 0x46, 0x00);
+}
+#endif