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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-06-29 22:34:07 +0300 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-07-02 09:09:22 +0000 |
| commit | 8c9be4327154ef46ffc96da13f816ffddb77253d (patch) | |
| tree | 41f60ea52740d9e35179dd7aca7a1c1bacfd0843 | |
| parent | a19b07fec13e713004e722f439e1ed7bc2e6ebd0 (diff) | |
| download | coreboot-8c9be4327154ef46ffc96da13f816ffddb77253d.tar.xz | |
device/pci_rom: Fix on-board optionrom address
The function pci_rom_probe() may be called multiple times
for a device. For cases where CBFS does not contain optionrom
file, only the first time probing for the on-board ROM
chip worked.
PCI_ROM_ADDRESS_ENABLE is set on the first run. Mask out all
the reserved bits of PCI_ROM_ADDRESS register to get correct
physical address for rom_header.
Change-Id: I14374954af09201494bf2f13e5a6e4dc640c05ee
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33908
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: Mike Banon <mikebdp2@gmail.com>
| -rw-r--r-- | src/device/pci_rom.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/device/pci_rom.c b/src/device/pci_rom.c index 3160c2041b..7322e57f45 100644 --- a/src/device/pci_rom.c +++ b/src/device/pci_rom.c @@ -77,6 +77,8 @@ struct rom_header *pci_rom_probe(struct device *dev) rom_address|PCI_ROM_ADDRESS_ENABLE); } + rom_address &= PCI_ROM_ADDRESS_MASK; + printk(BIOS_DEBUG, "Option ROM address for %s = %lx\n", dev_path(dev), (unsigned long)rom_address); rom_header = (struct rom_header *)rom_address; |