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authorSumeet R Pawnikar <sumeet.r.pawnikar@intel.com>2020-11-04 10:23:15 +0530
committerPatrick Georgi <pgeorgi@google.com>2020-11-09 07:28:19 +0000
commit8e57299a0da5dc9928b97d94b0265cf6883de005 (patch)
tree30c4926b1e38be73e8837b02817c5fbb6d89d8c4
parentac12976f0c411c1b337bf9a9619b2b54e81f362b (diff)
downloadcoreboot-8e57299a0da5dc9928b97d94b0265cf6883de005.tar.xz
mb/intel/jasperlake_rvp: Update Power Limit2 minimum value
Update Power Limit2 (PL2) minimum value to the same as maximum value for jasperlake rvp board. DTT does not throttle PL2, so this minimum value change here does not impact any existing behavior on the system. BUG=None BRANCH=None TEST=Build and test on jasperlake rvp board Change-Id: I862f7106846de5fb37f74419807eedc3096ded8a Signed-off-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47201 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
-rw-r--r--src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb b/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb
index 06cf4f6a63..abb5dc83a1 100644
--- a/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb
+++ b/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb
@@ -189,7 +189,7 @@ chip soc/intel/jasperlake
.time_window_max = 1 * MSECS_PER_SEC,
.granularity = 200,}"
register "controls.power_limits.pl2" = "{
- .min_power = 6000,
+ .min_power = 20000,
.max_power = 20000,
.time_window_min = 1 * MSECS_PER_SEC,
.time_window_max = 1 * MSECS_PER_SEC,