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authorPatrick Georgi <pgeorgi@chromium.org>2016-04-14 14:45:22 +0200
committerMartin Roth <martinroth@google.com>2016-04-16 02:01:51 +0200
commit91d94b090799b5be5eafb5a82e247d928e982698 (patch)
treee400b226001980358c788b1846236c9322a9c97d
parenta6dbfb5808b66197ea2c9b0c5e208cbd60099a12 (diff)
downloadcoreboot-91d94b090799b5be5eafb5a82e247d928e982698.tar.xz
google/gru: Incorporate feedback to #14279
To avoid diverging too much on an actively developed code base, keep the changes to a separate commit that can be downstreamed more easily: - removed unused includes - gave kevin board a "Kevin" part number - marked RW_LEGACY as CBFS region (to follow up upstream changes) - moved romstage entry point to SoC code (instead of encouraging per-board copy pasta) Change-Id: Ief0c8db3c4af96fe2be2e2397d8874ad06fb6f1f Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: https://review.coreboot.org/14362 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
-rw-r--r--src/mainboard/google/gru/Kconfig1
-rw-r--r--src/mainboard/google/gru/Makefile.inc1
-rw-r--r--src/mainboard/google/gru/chromeos.c4
-rw-r--r--src/mainboard/google/gru/chromeos.fmd2
-rw-r--r--src/mainboard/google/gru/mainboard.c5
-rw-r--r--src/soc/rockchip/rk3399/Makefile.inc1
-rw-r--r--src/soc/rockchip/rk3399/romstage.c (renamed from src/mainboard/google/gru/romstage.c)0
7 files changed, 3 insertions, 11 deletions
diff --git a/src/mainboard/google/gru/Kconfig b/src/mainboard/google/gru/Kconfig
index c225d101e1..6f234ad332 100644
--- a/src/mainboard/google/gru/Kconfig
+++ b/src/mainboard/google/gru/Kconfig
@@ -41,6 +41,7 @@ config MAINBOARD_DIR
config MAINBOARD_PART_NUMBER
string
+ default "Kevin" if BOARD_GOOGLE_KEVIN
default "Gru"
config MAINBOARD_VENDOR
diff --git a/src/mainboard/google/gru/Makefile.inc b/src/mainboard/google/gru/Makefile.inc
index 752830c4cc..879520c95b 100644
--- a/src/mainboard/google/gru/Makefile.inc
+++ b/src/mainboard/google/gru/Makefile.inc
@@ -29,7 +29,6 @@ romstage-y += boardid.c
romstage-y += chromeos.c
romstage-y += memlayout.ld
romstage-y += reset.c
-romstage-y += romstage.c
ramstage-y += boardid.c
ramstage-y += chromeos.c
diff --git a/src/mainboard/google/gru/chromeos.c b/src/mainboard/google/gru/chromeos.c
index 6f9380d33c..da57d861c6 100644
--- a/src/mainboard/google/gru/chromeos.c
+++ b/src/mainboard/google/gru/chromeos.c
@@ -15,10 +15,6 @@
*/
#include <boot/coreboot_tables.h>
-#include <console/console.h>
-#include <ec/google/chromeec/ec.h>
-#include <ec/google/chromeec/ec_commands.h>
-#include <string.h>
#include <vendorcode/google/chromeos/chromeos.h>
void fill_lb_gpios(struct lb_gpios *gpios)
diff --git a/src/mainboard/google/gru/chromeos.fmd b/src/mainboard/google/gru/chromeos.fmd
index c3811707a8..bf30ddff29 100644
--- a/src/mainboard/google/gru/chromeos.fmd
+++ b/src/mainboard/google/gru/chromeos.fmd
@@ -25,5 +25,5 @@ FLASH@0x0 0x800000 {
SHARED_DATA@0x0 0x10000
}
RW_NVRAM@0x5f0000 0x10000
- RW_LEGACY@0x600000 0x200000
+ RW_LEGACY(CBFS)@0x600000 0x200000
}
diff --git a/src/mainboard/google/gru/mainboard.c b/src/mainboard/google/gru/mainboard.c
index 1641838a5a..649f16296c 100644
--- a/src/mainboard/google/gru/mainboard.c
+++ b/src/mainboard/google/gru/mainboard.c
@@ -14,12 +14,7 @@
*
*/
-#include <arch/cache.h>
-#include <arch/io.h>
-#include <boardid.h>
-#include <boot/coreboot_tables.h>
#include <device/device.h>
-#include <console/console.h>
static void mainboard_init(device_t dev)
{
diff --git a/src/soc/rockchip/rk3399/Makefile.inc b/src/soc/rockchip/rk3399/Makefile.inc
index 54a7b5168d..957124e54e 100644
--- a/src/soc/rockchip/rk3399/Makefile.inc
+++ b/src/soc/rockchip/rk3399/Makefile.inc
@@ -38,6 +38,7 @@ romstage-y += ../common/spi.c
romstage-$(CONFIG_DRIVERS_UART) += ../common/uart.c
romstage-y += clock.c
romstage-y += timer.c
+romstage-y += romstage.c
################################################################################
diff --git a/src/mainboard/google/gru/romstage.c b/src/soc/rockchip/rk3399/romstage.c
index 4786937acc..4786937acc 100644
--- a/src/mainboard/google/gru/romstage.c
+++ b/src/soc/rockchip/rk3399/romstage.c