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| author | Zheng Bao <zheng.bao@amd.com> | 2010-09-21 01:24:55 +0000 |
|---|---|---|
| committer | Zheng Bao <Zheng.Bao@amd.com> | 2010-09-21 01:24:55 +0000 |
| commit | 951a0feb2d5b2c68c1a15c192333578c6769e99e (patch) | |
| tree | 96bcb4e7023774afb0d5f8620299fa89f9051b7c | |
| parent | df35cdc198d9be8cb5a1c6a39c1adef92f5fd336 (diff) | |
| download | coreboot-951a0feb2d5b2c68c1a15c192333578c6769e99e.tar.xz | |
Fix the typo. Field DisAutoRefresh is in DramTimngHi.
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Acked-by: Marc Jones <marcj303@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5821 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
| -rw-r--r-- | src/northbridge/amd/amdmct/mct_ddr3/mct_d.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c b/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c index b6782bc007..08677ad27b 100644 --- a/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c +++ b/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c @@ -1220,7 +1220,7 @@ static void SPD2ndTiming(struct MCTStatStruc *pMCTstat, Set_NB32(dev, 0x88 + reg_off, DramTimingLo); /*DCT Timing Low*/ if (pDCTstat->Speed > 4) { - DramTimingLo |= 1 << DisAutoRefresh; + DramTimingHi |= 1 << DisAutoRefresh; } DramTimingHi |= 0x000018FF; Set_NB32(dev, 0x8c + reg_off, DramTimingHi); /*DCT Timing Hi*/ |