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authorRudolf Marek <r.marek@assembler.cz>2010-12-13 19:50:25 +0000
committerRudolf Marek <r.marek@assembler.cz>2010-12-13 19:50:25 +0000
commit97be27ebbae4693a0698838edd7ccea2239ef2db (patch)
tree8487d1d78bc0516485a14dae4a86b5bd30cb8794
parent29c7dfcadc49262271dba95697dab841ea076d17 (diff)
downloadcoreboot-97be27ebbae4693a0698838edd7ccea2239ef2db.tar.xz
We hardcode highmemory size in every northbridge! This is bad, and especially if suspend to ram is involved. Let the default be taken from cbmem.h which also handles the suspend logic.
Abuild tested. Please check all changes if I did not make any wrong while converting this to bytes. Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6171 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
-rw-r--r--src/include/cbmem.h9
-rw-r--r--src/lib/cbmem.c1
-rw-r--r--src/mainboard/emulation/qemu-x86/northbridge.c7
-rw-r--r--src/northbridge/amd/amdfam10/northbridge.c19
-rw-r--r--src/northbridge/amd/amdk8/northbridge.c18
-rw-r--r--src/northbridge/amd/gx1/northbridge.c7
-rw-r--r--src/northbridge/amd/gx2/northbridge.c7
-rw-r--r--src/northbridge/amd/lx/northbridge.c7
-rw-r--r--src/northbridge/intel/e7501/northbridge.c7
-rw-r--r--src/northbridge/intel/e7520/northbridge.c7
-rw-r--r--src/northbridge/intel/e7525/northbridge.c7
-rw-r--r--src/northbridge/intel/i3100/northbridge.c7
-rw-r--r--src/northbridge/intel/i440bx/northbridge.c7
-rw-r--r--src/northbridge/intel/i440lx/northbridge.c7
-rw-r--r--src/northbridge/intel/i82810/northbridge.c7
-rw-r--r--src/northbridge/intel/i82830/northbridge.c7
-rw-r--r--src/northbridge/intel/i855/northbridge.c7
-rw-r--r--src/northbridge/intel/i945/northbridge.c7
-rw-r--r--src/northbridge/via/cn400/northbridge.c11
-rw-r--r--src/northbridge/via/cn700/northbridge.c11
-rw-r--r--src/northbridge/via/cx700/northbridge.c11
-rw-r--r--src/northbridge/via/vt8601/northbridge.c11
-rw-r--r--src/northbridge/via/vt8623/northbridge.c11
23 files changed, 89 insertions, 111 deletions
diff --git a/src/include/cbmem.h b/src/include/cbmem.h
index 6f40d4e485..5fd2e78aff 100644
--- a/src/include/cbmem.h
+++ b/src/include/cbmem.h
@@ -21,13 +21,14 @@
#define _CBMEM_H_
/* Reserve 64k for ACPI and other tables */
-#define HIGH_MEMORY_TABLES ( 64 * 1024 )
+#define HIGH_MEMORY_DEF_SIZE ( 64 * 1024 )
+extern uint64_t high_tables_base, high_tables_size;
#if CONFIG_HAVE_ACPI_RESUME
-#define HIGH_MEMORY_SIZE ((CONFIG_RAMTOP - CONFIG_RAMBASE) + HIGH_MEMORY_TABLES)
-#define HIGH_MEMORY_SAVE ( HIGH_MEMORY_SIZE - HIGH_MEMORY_TABLES )
+#define HIGH_MEMORY_SIZE ((CONFIG_RAMTOP - CONFIG_RAMBASE) + HIGH_MEMORY_DEF_SIZE)
+#define HIGH_MEMORY_SAVE ( HIGH_MEMORY_SIZE - HIGH_MEMORY_DEF_SIZE )
#else
-#define HIGH_MEMORY_SIZE HIGH_MEMORY_TABLES
+#define HIGH_MEMORY_SIZE HIGH_MEMORY_DEF_SIZE
#endif
#define CBMEM_ID_FREESPACE 0x46524545
diff --git a/src/lib/cbmem.c b/src/lib/cbmem.c
index d85c748810..aa10a15798 100644
--- a/src/lib/cbmem.c
+++ b/src/lib/cbmem.c
@@ -193,7 +193,6 @@ void *cbmem_find(u32 id)
#if CONFIG_HAVE_ACPI_RESUME
extern u8 acpi_slp_type;
#endif
-extern uint64_t high_tables_base, high_tables_size;
void cbmem_initialize(void)
{
diff --git a/src/mainboard/emulation/qemu-x86/northbridge.c b/src/mainboard/emulation/qemu-x86/northbridge.c
index 7a73ecff69..18996482d6 100644
--- a/src/mainboard/emulation/qemu-x86/northbridge.c
+++ b/src/mainboard/emulation/qemu-x86/northbridge.c
@@ -11,8 +11,7 @@
#include <delay.h>
#if CONFIG_WRITE_HIGH_TABLES==1
-#define HIGH_TABLES_SIZE 64 // maximum size of high tables in KB
-extern uint64_t high_tables_base, high_tables_size;
+#include <cbmem.h>
#endif
#define CMOS_ADDR_PORT 0x70
@@ -49,8 +48,8 @@ static void cpu_pci_domain_set_resources(device_t dev)
#if CONFIG_WRITE_HIGH_TABLES==1
/* Leave some space for ACPI, PIRQ and MP tables */
- high_tables_base = (tomk - HIGH_TABLES_SIZE) * 1024;
- high_tables_size = HIGH_TABLES_SIZE * 1024;
+ high_tables_base = (tomk * 1024) - HIGH_MEMORY_SIZE;
+ high_tables_size = HIGH_MEMORY_SIZE;
#endif
assign_resources(dev->link_list);
diff --git a/src/northbridge/amd/amdfam10/northbridge.c b/src/northbridge/amd/amdfam10/northbridge.c
index b3e99ec441..c64747403d 100644
--- a/src/northbridge/amd/amdfam10/northbridge.c
+++ b/src/northbridge/amd/amdfam10/northbridge.c
@@ -841,8 +841,7 @@ static void disable_hoist_memory(unsigned long hole_startk, int node_id)
#endif
#if CONFIG_WRITE_HIGH_TABLES==1
-#define HIGH_TABLES_SIZE 64 // maximum size of high tables in KB
-extern uint64_t high_tables_base, high_tables_size;
+#include <cbmem.h>
#endif
#if CONFIG_GFXUMA == 1
@@ -1033,13 +1032,13 @@ static void amdfam10_domain_set_resources(device_t dev)
if (high_tables_base==0) {
/* Leave some space for ACPI, PIRQ and MP tables */
#if CONFIG_GFXUMA == 1
- high_tables_base = uma_memory_base - (HIGH_TABLES_SIZE * 1024);
+ high_tables_base = uma_memory_base - HIGH_MEMORY_SIZE;
#else
- high_tables_base = (mmio_basek - HIGH_TABLES_SIZE) * 1024;
+ high_tables_base = (mmio_basek * 1024) - HIGH_MEMORY_SIZE;
#endif
- high_tables_size = HIGH_TABLES_SIZE * 1024;
- printk(BIOS_DEBUG, " split: %dK table at =%08llx\n", HIGH_TABLES_SIZE,
- high_tables_base);
+ high_tables_size = HIGH_MEMORY_SIZE;
+ printk(BIOS_DEBUG, " split: %dK table at =%08llx\n",
+ HIGH_MEMORY_SIZE / 1024, high_tables_base);
}
#endif
}
@@ -1078,11 +1077,11 @@ static void amdfam10_domain_set_resources(device_t dev)
if (high_tables_base==0) {
/* Leave some space for ACPI, PIRQ and MP tables */
#if CONFIG_GFXUMA == 1
- high_tables_base = uma_memory_base - (HIGH_TABLES_SIZE * 1024);
+ high_tables_base = uma_memory_base - HIGH_MEMORY_SIZE;
#else
- high_tables_base = (limitk - HIGH_TABLES_SIZE) * 1024;
+ high_tables_base = (limitk * 1024) - HIGH_MEMORY_SIZE;
#endif
- high_tables_size = HIGH_TABLES_SIZE * 1024;
+ high_tables_size = HIGH_MEMORY_SIZE;
}
#endif
}
diff --git a/src/northbridge/amd/amdk8/northbridge.c b/src/northbridge/amd/amdk8/northbridge.c
index f592880b92..90b4ebf51d 100644
--- a/src/northbridge/amd/amdk8/northbridge.c
+++ b/src/northbridge/amd/amdk8/northbridge.c
@@ -820,8 +820,6 @@ static u32 hoist_memory(unsigned long hole_startk, int node_id)
#if CONFIG_WRITE_HIGH_TABLES==1
#include <cbmem.h>
-#define HIGH_TABLES_SIZE ((HIGH_MEMORY_SIZE + 1024) / 1024)
-extern uint64_t high_tables_base, high_tables_size;
#endif
#if CONFIG_GFXUMA == 1
@@ -1020,13 +1018,13 @@ static void amdk8_domain_set_resources(device_t dev)
if (high_tables_base==0) {
/* Leave some space for ACPI, PIRQ and MP tables */
#if CONFIG_GFXUMA == 1
- high_tables_base = uma_memory_base - (HIGH_TABLES_SIZE * 1024);
+ high_tables_base = uma_memory_base - HIGH_MEMORY_SIZE;
#else
- high_tables_base = (mmio_basek - HIGH_TABLES_SIZE) * 1024;
+ high_tables_base = (mmio_basek * 1024) - HIGH_MEMORY_SIZE;
#endif
- high_tables_size = HIGH_TABLES_SIZE * 1024;
- printk(BIOS_DEBUG, " split: %dK table at =%08llx\n", HIGH_TABLES_SIZE,
- high_tables_base);
+ high_tables_size = HIGH_MEMORY_SIZE;
+ printk(BIOS_DEBUG, " split: %dK table at =%08llx\n",
+ HIGH_MEMORY_SIZE / 1024, high_tables_base);
}
#endif
}
@@ -1065,11 +1063,11 @@ static void amdk8_domain_set_resources(device_t dev)
if (high_tables_base==0) {
/* Leave some space for ACPI, PIRQ and MP tables */
#if CONFIG_GFXUMA == 1
- high_tables_base = uma_memory_base - (HIGH_TABLES_SIZE * 1024);
+ high_tables_base = uma_memory_base - HIGH_MEMORY_SIZE;
#else
- high_tables_base = (limitk - HIGH_TABLES_SIZE) * 1024;
+ high_tables_base = (limitk * 1024) - HIGH_MEMORY_SIZE;
#endif
- high_tables_size = HIGH_TABLES_SIZE * 1024;
+ high_tables_size = HIGH_MEMORY_SIZE;
}
#endif
}
diff --git a/src/northbridge/amd/gx1/northbridge.c b/src/northbridge/amd/gx1/northbridge.c
index 9fa5e33cff..abbc85558c 100644
--- a/src/northbridge/amd/gx1/northbridge.c
+++ b/src/northbridge/amd/gx1/northbridge.c
@@ -67,8 +67,7 @@ static const struct pci_driver northbridge_driver __pci_driver = {
};
#if CONFIG_WRITE_HIGH_TABLES==1
-#define HIGH_TABLES_SIZE 64 // maximum size of high tables in KB
-extern uint64_t high_tables_base, high_tables_size;
+#include <cbmem.h>
#endif
static void pci_domain_set_resources(device_t dev)
@@ -116,8 +115,8 @@ static void pci_domain_set_resources(device_t dev)
#if CONFIG_WRITE_HIGH_TABLES==1
/* Leave some space for ACPI, PIRQ and MP tables */
- high_tables_base = (tolmk - HIGH_TABLES_SIZE) * 1024;
- high_tables_size = HIGH_TABLES_SIZE * 1024;
+ high_tables_base = (tolmk * 1024) - HIGH_MEMORY_SIZE;
+ high_tables_size = HIGH_MEMORY_SIZE;
#endif
/* Report the memory regions */
diff --git a/src/northbridge/amd/gx2/northbridge.c b/src/northbridge/amd/gx2/northbridge.c
index 62c1c2eaf7..987ebabfef 100644
--- a/src/northbridge/amd/gx2/northbridge.c
+++ b/src/northbridge/amd/gx2/northbridge.c
@@ -432,8 +432,7 @@ static struct device_operations cpu_bus_ops = {
void chipsetInit (void);
#if CONFIG_WRITE_HIGH_TABLES==1
-#define HIGH_TABLES_SIZE 64 // maximum size of high tables in KB
-extern uint64_t high_tables_base, high_tables_size;
+#include <cbmem.h>
#endif
static void enable_dev(struct device *dev)
@@ -457,8 +456,8 @@ static void enable_dev(struct device *dev)
tomk = ((sizeram() - VIDEO_MB) * 1024) - SMM_SIZE;
#if CONFIG_WRITE_HIGH_TABLES==1
/* Leave some space for ACPI, PIRQ and MP tables */
- high_tables_base = (tomk - HIGH_TABLES_SIZE) * 1024;
- high_tables_size = HIGH_TABLES_SIZE * 1024;
+ high_tables_base = (tomk * 1024) - HIGH_MEMORY_SIZE;
+ high_tables_size = HIGH_MEMORY_SIZE;
#endif
ram_resource(dev, 0, 0, tomk);
} else if (dev->path.type == DEVICE_PATH_APIC_CLUSTER) {
diff --git a/src/northbridge/amd/lx/northbridge.c b/src/northbridge/amd/lx/northbridge.c
index bedeaf6ea8..61f3afec5f 100644
--- a/src/northbridge/amd/lx/northbridge.c
+++ b/src/northbridge/amd/lx/northbridge.c
@@ -373,8 +373,7 @@ static const struct pci_driver northbridge_driver __pci_driver = {
};
#if CONFIG_WRITE_HIGH_TABLES==1
-#define HIGH_TABLES_SIZE 64 // maximum size of high tables in KB
-extern uint64_t high_tables_base, high_tables_size;
+#include <cbmem.h>
#endif
static void pci_domain_set_resources(device_t dev)
@@ -396,8 +395,8 @@ static void pci_domain_set_resources(device_t dev)
#if CONFIG_WRITE_HIGH_TABLES==1
/* Leave some space for ACPI, PIRQ and MP tables */
- high_tables_base = (tomk - HIGH_TABLES_SIZE) * 1024;
- high_tables_size = HIGH_TABLES_SIZE * 1024;
+ high_tables_base = (tomk * 1024) - HIGH_MEMORY_SIZE;
+ high_tables_size = HIGH_MEMORY_SIZE;
#endif
}
diff --git a/src/northbridge/intel/e7501/northbridge.c b/src/northbridge/intel/e7501/northbridge.c
index 90985e2699..e6e955fb4f 100644
--- a/src/northbridge/intel/e7501/northbridge.c
+++ b/src/northbridge/intel/e7501/northbridge.c
@@ -10,8 +10,7 @@
#include "chip.h"
#if CONFIG_WRITE_HIGH_TABLES==1
-#define HIGH_TABLES_SIZE 64 // maximum size of high tables in KB
-extern uint64_t high_tables_base, high_tables_size;
+#include <cbmem.h>
#endif
static void pci_domain_set_resources(device_t dev)
@@ -92,8 +91,8 @@ static void pci_domain_set_resources(device_t dev)
#if CONFIG_WRITE_HIGH_TABLES==1
/* Leave some space for ACPI, PIRQ and MP tables */
- high_tables_base = (tolmk - HIGH_TABLES_SIZE) * 1024;
- high_tables_size = HIGH_TABLES_SIZE * 1024;
+ high_tables_base = (tolmk * 1024) - HIGH_MEMORY_SIZE;
+ high_tables_size = HIGH_MEMORY_SIZE;
#endif
}
assign_resources(dev->link_list);
diff --git a/src/northbridge/intel/e7520/northbridge.c b/src/northbridge/intel/e7520/northbridge.c
index fceceb2a47..49c8ba3c71 100644
--- a/src/northbridge/intel/e7520/northbridge.c
+++ b/src/northbridge/intel/e7520/northbridge.c
@@ -17,8 +17,7 @@
static unsigned int max_bus;
#if CONFIG_WRITE_HIGH_TABLES==1
-#define HIGH_TABLES_SIZE 64 // maximum size of high tables in KB
-extern uint64_t high_tables_base, high_tables_size;
+#include <cbmem.h>
#endif
static void pci_domain_set_resources(device_t dev)
@@ -111,8 +110,8 @@ static void pci_domain_set_resources(device_t dev)
#if CONFIG_WRITE_HIGH_TABLES==1
/* Leave some space for ACPI, PIRQ and MP tables */
- high_tables_base = (tolmk - HIGH_TABLES_SIZE) * 1024;
- high_tables_size = HIGH_TABLES_SIZE * 1024;
+ high_tables_base = (tolmk * 1024) - HIGH_MEMORY_SIZE;
+ high_tables_size = HIGH_MEMORY_SIZE;
#endif
}
assign_resources(dev->link_list);
diff --git a/src/northbridge/intel/e7525/northbridge.c b/src/northbridge/intel/e7525/northbridge.c
index 6ffe3b1b04..5e9f9c53e6 100644
--- a/src/northbridge/intel/e7525/northbridge.c
+++ b/src/northbridge/intel/e7525/northbridge.c
@@ -17,8 +17,7 @@
static unsigned int max_bus;
#if CONFIG_WRITE_HIGH_TABLES==1
-#define HIGH_TABLES_SIZE 64 // maximum size of high tables in KB
-extern uint64_t high_tables_base, high_tables_size;
+#include <cbmem.h>
#endif
static void pci_domain_set_resources(device_t dev)
@@ -111,8 +110,8 @@ static void pci_domain_set_resources(device_t dev)
#if CONFIG_WRITE_HIGH_TABLES==1
/* Leave some space for ACPI, PIRQ and MP tables */
- high_tables_base = (tolmk - HIGH_TABLES_SIZE) * 1024;
- high_tables_size = HIGH_TABLES_SIZE * 1024;
+ high_tables_base = (tolmk * 1024) - HIGH_MEMORY_SIZE;
+ high_tables_size = HIGH_MEMORY_SIZE;
#endif
}
assign_resources(dev->link_list);
diff --git a/src/northbridge/intel/i3100/northbridge.c b/src/northbridge/intel/i3100/northbridge.c
index 53b1dd7bd2..acd4c3c302 100644
--- a/src/northbridge/intel/i3100/northbridge.c
+++ b/src/northbridge/intel/i3100/northbridge.c
@@ -38,8 +38,7 @@
static u32 max_bus;
#if CONFIG_WRITE_HIGH_TABLES==1
-#define HIGH_TABLES_SIZE 64 // maximum size of high tables in KB
-extern uint64_t high_tables_base, high_tables_size;
+#include <cbmem.h>
#endif
static void pci_domain_set_resources(device_t dev)
@@ -132,8 +131,8 @@ static void pci_domain_set_resources(device_t dev)
#if CONFIG_WRITE_HIGH_TABLES==1
/* Leave some space for ACPI, PIRQ and MP tables */
- high_tables_base = (tolmk - HIGH_TABLES_SIZE) * 1024;
- high_tables_size = HIGH_TABLES_SIZE * 1024;
+ high_tables_base = (tolmk * 1024) - HIGH_MEMORY_SIZE;
+ high_tables_size = HIGH_MEMORY_SIZE;
#endif
}
assign_resources(dev->link_list);
diff --git a/src/northbridge/intel/i440bx/northbridge.c b/src/northbridge/intel/i440bx/northbridge.c
index 3873d10364..136755e1e2 100644
--- a/src/northbridge/intel/i440bx/northbridge.c
+++ b/src/northbridge/intel/i440bx/northbridge.c
@@ -34,8 +34,7 @@ static const struct pci_driver northbridge_driver __pci_driver = {
};
#if CONFIG_WRITE_HIGH_TABLES==1
-#define HIGH_TABLES_SIZE 64 // maximum size of high tables in KB
-extern uint64_t high_tables_base, high_tables_size;
+#include <cbmem.h>
#endif
static void i440bx_domain_set_resources(device_t dev)
@@ -75,8 +74,8 @@ static void i440bx_domain_set_resources(device_t dev)
#if CONFIG_WRITE_HIGH_TABLES==1
/* Leave some space for ACPI, PIRQ and MP tables */
- high_tables_base = (tomk - HIGH_TABLES_SIZE) * 1024;
- high_tables_size = HIGH_TABLES_SIZE * 1024;
+ high_tables_base = (tomk * 1024) - HIGH_MEMORY_SIZE;
+ high_tables_size = HIGH_MEMORY_SIZE;
#endif
}
assign_resources(dev->link_list);
diff --git a/src/northbridge/intel/i440lx/northbridge.c b/src/northbridge/intel/i440lx/northbridge.c
index 40d8b01175..73be101b09 100644
--- a/src/northbridge/intel/i440lx/northbridge.c
+++ b/src/northbridge/intel/i440lx/northbridge.c
@@ -63,8 +63,7 @@ static const struct pci_driver northbridge_driver __pci_driver = {
};
#if CONFIG_WRITE_HIGH_TABLES==1
-#define HIGH_TABLES_SIZE 64 // maximum size of high tables in KB
-extern uint64_t high_tables_base, high_tables_size;
+#include <cbmem.h>
#endif
static void i440lx_domain_set_resources(device_t dev)
@@ -104,8 +103,8 @@ static void i440lx_domain_set_resources(device_t dev)
#if CONFIG_WRITE_HIGH_TABLES==1
/* Leave some space for ACPI, PIRQ and MP tables */
- high_tables_base = (tomk - HIGH_TABLES_SIZE) * 1024;
- high_tables_size = HIGH_TABLES_SIZE * 1024;
+ high_tables_base = (tomk * 1024) - HIGH_MEMORY_SIZE;
+ high_tables_size = HIGH_MEMORY_SIZE;
#endif
}
assign_resources(dev->link_list);
diff --git a/src/northbridge/intel/i82810/northbridge.c b/src/northbridge/intel/i82810/northbridge.c
index 4bf7d466e5..3434c6d71b 100644
--- a/src/northbridge/intel/i82810/northbridge.c
+++ b/src/northbridge/intel/i82810/northbridge.c
@@ -84,8 +84,7 @@ static int translate_i82810_to_mb[] = {
};
#if CONFIG_WRITE_HIGH_TABLES==1
-#define HIGH_TABLES_SIZE 64 // maximum size of high tables in KB
-extern uint64_t high_tables_base, high_tables_size;
+#include <cbmem.h>
#endif
static void pci_domain_set_resources(device_t dev)
@@ -150,8 +149,8 @@ static void pci_domain_set_resources(device_t dev)
#if CONFIG_WRITE_HIGH_TABLES==1
/* Leave some space for ACPI, PIRQ and MP tables */
- high_tables_base = (tomk - HIGH_TABLES_SIZE) * 1024;
- high_tables_size = HIGH_TABLES_SIZE * 1024;
+ high_tables_base = (tomk * 1024) - HIGH_MEMORY_SIZE;
+ high_tables_size = HIGH_MEMORY_SIZE;
#endif
assign_resources(dev->link_list);
}
diff --git a/src/northbridge/intel/i82830/northbridge.c b/src/northbridge/intel/i82830/northbridge.c
index f2ae5fa1fd..dea05db137 100644
--- a/src/northbridge/intel/i82830/northbridge.c
+++ b/src/northbridge/intel/i82830/northbridge.c
@@ -65,8 +65,7 @@ int add_northbridge_resources(struct lb_memory *mem)
}
#if CONFIG_WRITE_HIGH_TABLES==1
-#define HIGH_TABLES_SIZE 64 // maximum size of high tables in KB
-extern uint64_t high_tables_base, high_tables_size;
+#include <cbmem.h>
#endif
static void pci_domain_set_resources(device_t dev)
{
@@ -119,8 +118,8 @@ static void pci_domain_set_resources(device_t dev)
#if CONFIG_WRITE_HIGH_TABLES==1
/* Leave some space for ACPI, PIRQ and MP tables */
- high_tables_base = (tomk - HIGH_TABLES_SIZE) * 1024;
- high_tables_size = HIGH_TABLES_SIZE * 1024;
+ high_tables_base = (tomk * 1024) - HIGH_MEMORY_SIZE;
+ high_tables_size = HIGH_MEMORY_SIZE;
#endif
}
diff --git a/src/northbridge/intel/i855/northbridge.c b/src/northbridge/intel/i855/northbridge.c
index e59dfd4ccb..53f599715b 100644
--- a/src/northbridge/intel/i855/northbridge.c
+++ b/src/northbridge/intel/i855/northbridge.c
@@ -54,8 +54,7 @@ static const struct pci_driver northbridge_driver __pci_driver = {
};
#if CONFIG_WRITE_HIGH_TABLES==1
-#define HIGH_TABLES_SIZE 64 // maximum size of high tables in KB
-extern uint64_t high_tables_base, high_tables_size;
+#include <cbmem.h>
#endif
static void pci_domain_set_resources(device_t dev)
{
@@ -112,8 +111,8 @@ static void pci_domain_set_resources(device_t dev)
#if CONFIG_WRITE_HIGH_TABLES==1
/* Leave some space for ACPI, PIRQ and MP tables */
- high_tables_base = (tomk - HIGH_TABLES_SIZE) * 1024;
- high_tables_size = HIGH_TABLES_SIZE * 1024;
+ high_tables_base = (tomk * 1024) - HIGH_MEMORY_SIZE;
+ high_tables_size = HIGH_MEMORY_SIZE;
#endif
}
assign_resources(dev->link_list);
diff --git a/src/northbridge/intel/i945/northbridge.c b/src/northbridge/intel/i945/northbridge.c
index 9963bed5ce..925d108154 100644
--- a/src/northbridge/intel/i945/northbridge.c
+++ b/src/northbridge/intel/i945/northbridge.c
@@ -93,8 +93,7 @@ static void add_fixed_resources(struct device *dev, int index)
}
#if CONFIG_WRITE_HIGH_TABLES==1
-#define HIGH_TABLES_SIZE 1024 // maximum size of high tables in KB
-extern uint64_t high_tables_base, high_tables_size;
+#include <cbmem.h>
#endif
static void pci_domain_set_resources(device_t dev)
@@ -183,8 +182,8 @@ static void pci_domain_set_resources(device_t dev)
#if CONFIG_WRITE_HIGH_TABLES==1
/* Leave some space for ACPI, PIRQ and MP tables */
- high_tables_base = (tomk - HIGH_TABLES_SIZE) * 1024;
- high_tables_size = HIGH_TABLES_SIZE * 1024;
+ high_tables_base = (tomk * 1024) - HIGH_MEMORY_SIZE;
+ high_tables_size = HIGH_MEMORY_SIZE;
#endif
}
diff --git a/src/northbridge/via/cn400/northbridge.c b/src/northbridge/via/cn400/northbridge.c
index 3982c9877c..2cc331b24d 100644
--- a/src/northbridge/via/cn400/northbridge.c
+++ b/src/northbridge/via/cn400/northbridge.c
@@ -178,9 +178,7 @@ static void ram_reservation(device_t dev, unsigned long index,
#endif
#if CONFIG_WRITE_HIGH_TABLES==1
-/* maximum size of high tables in KB */
-#define HIGH_TABLES_SIZE 64
-extern uint64_t high_tables_base, high_tables_size;
+#include <cbmem.h>
#endif
static void cn400_domain_set_resources(device_t dev)
@@ -211,9 +209,10 @@ static void cn400_domain_set_resources(device_t dev)
#if CONFIG_WRITE_HIGH_TABLES == 1
/* Locate the High Tables at the Top of Low Memory below the Video RAM */
- high_tables_base = (uint64_t) (tolmk - (CONFIG_VIDEO_MB *1024) - HIGH_TABLES_SIZE) * 1024;
- high_tables_size = (uint64_t) HIGH_TABLES_SIZE* 1024;
- printk(BIOS_SPEW, "tom: %lx, high_tables_base: %llx, high_tables_size: %llx\n", tomk*1024, high_tables_base, high_tables_size);
+ high_tables_base = ((tolmk - (CONFIG_VIDEO_MB *1024)) * 1024) - HIGH_MEMORY_SIZE;
+ high_tables_size = HIGH_MEMORY_SIZE;
+ printk(BIOS_SPEW, "tom: %lx, high_tables_base: %llx, high_tables_size: %llx\n",
+ tomk*1024, high_tables_base, high_tables_size);
#endif
/* Report the memory regions. */
diff --git a/src/northbridge/via/cn700/northbridge.c b/src/northbridge/via/cn700/northbridge.c
index d0ad095151..6400e223ba 100644
--- a/src/northbridge/via/cn700/northbridge.c
+++ b/src/northbridge/via/cn700/northbridge.c
@@ -98,9 +98,7 @@ static const struct pci_driver memctrl_driver __pci_driver = {
};
#if CONFIG_WRITE_HIGH_TABLES==1
-/* maximum size of high tables in KB */
-#define HIGH_TABLES_SIZE 64
-extern uint64_t high_tables_base, high_tables_size;
+#include <cbmem.h>
#endif
static void pci_domain_set_resources(device_t dev)
@@ -141,9 +139,10 @@ static void pci_domain_set_resources(device_t dev)
}
#if CONFIG_WRITE_HIGH_TABLES == 1
- high_tables_base = (tolmk - CONFIG_VIDEO_MB * 1024 - HIGH_TABLES_SIZE) * 1024;
- high_tables_size = HIGH_TABLES_SIZE * 1024;
- printk(BIOS_DEBUG, "tom: %lx, high_tables_base: %llx, high_tables_size: %llx\n", tomk*1024, high_tables_base, high_tables_size);
+ high_tables_base = ((tolmk - CONFIG_VIDEO_MB * 1024) * 1024) - HIGH_MEMORY_SIZE;
+ high_tables_size = HIGH_MEMORY_SIZE;
+ printk(BIOS_DEBUG, "tom: %lx, high_tables_base: %llx, high_tables_size: %llx\n",
+ tomk*1024, high_tables_base, high_tables_size);
#endif
/* Report the memory regions. */
diff --git a/src/northbridge/via/cx700/northbridge.c b/src/northbridge/via/cx700/northbridge.c
index df9dde6e6d..9e302983c2 100644
--- a/src/northbridge/via/cx700/northbridge.c
+++ b/src/northbridge/via/cx700/northbridge.c
@@ -33,9 +33,7 @@
#include "northbridge.h"
#if CONFIG_WRITE_HIGH_TABLES==1
-/* maximum size of high tables in KB */
-#define HIGH_TABLES_SIZE 64
-extern uint64_t high_tables_base, high_tables_size;
+#include <cbmem.h>
#endif
static void pci_domain_set_resources(device_t dev)
@@ -77,9 +75,10 @@ static void pci_domain_set_resources(device_t dev)
}
#if CONFIG_WRITE_HIGH_TABLES == 1
- high_tables_base = (tolmk - HIGH_TABLES_SIZE) * 1024;
- high_tables_size = HIGH_TABLES_SIZE* 1024;
- printk(BIOS_DEBUG, "tom: %lx, high_tables_base: %llx, high_tables_size: %llx\n", tomk*1024, high_tables_base, high_tables_size);
+ high_tables_base = (tolmk * 1024) - HIGH_MEMORY_SIZE;
+ high_tables_size = HIGH_MEMORY_SIZE;
+ printk(BIOS_DEBUG, "tom: %lx, high_tables_base: %llx, high_tables_size: %llx\n",
+ tomk*1024, high_tables_base, high_tables_size);
#endif
/* Report the memory regions */
diff --git a/src/northbridge/via/vt8601/northbridge.c b/src/northbridge/via/vt8601/northbridge.c
index d2731c7074..3a7ada51fb 100644
--- a/src/northbridge/via/vt8601/northbridge.c
+++ b/src/northbridge/via/vt8601/northbridge.c
@@ -46,9 +46,7 @@ static const struct pci_driver northbridge_driver __pci_driver = {
};
#if CONFIG_WRITE_HIGH_TABLES==1
-/* maximum size of high tables in KB */
-#define HIGH_TABLES_SIZE 64
-extern uint64_t high_tables_base, high_tables_size;
+#include <cbmem.h>
#endif
static void pci_domain_set_resources(device_t dev)
@@ -92,9 +90,10 @@ static void pci_domain_set_resources(device_t dev)
}
#if CONFIG_WRITE_HIGH_TABLES == 1
- high_tables_base = (tolmk - HIGH_TABLES_SIZE) * 1024;
- high_tables_size = HIGH_TABLES_SIZE* 1024;
- printk(BIOS_DEBUG, "tom: %lx, high_tables_base: %llx, high_tables_size: %llx\n", tomk*1024, high_tables_base, high_tables_size);
+ high_tables_base = (tolmk * 1024) - HIGH_MEMORY_SIZE;
+ high_tables_size = HIGH_MEMORY_SIZE;
+ printk(BIOS_DEBUG, "tom: %lx, high_tables_base: %llx, high_tables_size: %llx\n",
+ tomk*1024, high_tables_base, high_tables_size);
#endif
/* Report the memory regions */
diff --git a/src/northbridge/via/vt8623/northbridge.c b/src/northbridge/via/vt8623/northbridge.c
index f67d13c021..19f14d56a4 100644
--- a/src/northbridge/via/vt8623/northbridge.c
+++ b/src/northbridge/via/vt8623/northbridge.c
@@ -106,9 +106,7 @@ static const struct pci_driver agp_driver __pci_driver = {
};
#if CONFIG_WRITE_HIGH_TABLES==1
-/* maximum size of high tables in KB */
-#define HIGH_TABLES_SIZE 64
-extern uint64_t high_tables_base, high_tables_size;
+#include <cbmem.h>
#endif
static void pci_domain_set_resources(device_t dev)
@@ -152,9 +150,10 @@ static void pci_domain_set_resources(device_t dev)
}
#if CONFIG_WRITE_HIGH_TABLES == 1
- high_tables_base = (tolmk - HIGH_TABLES_SIZE) * 1024;
- high_tables_size = HIGH_TABLES_SIZE* 1024;
- printk(BIOS_DEBUG, "tom: %lx, high_tables_base: %llx, high_tables_size: %llx\n", tomk*1024, high_tables_base, high_tables_size);
+ high_tables_base = (tolmk * 1024) - HIGH_MEMORY_SIZE;
+ high_tables_size = HIGH_MEMORY_SIZE;
+ printk(BIOS_DEBUG, "tom: %lx, high_tables_base: %llx, high_tables_size: %llx\n",
+ tomk*1024, high_tables_base, high_tables_size);
#endif
/* Report the memory regions */