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authorStefan Reinauer <stepan@coresystems.de>2010-02-16 00:06:42 +0000
committerStefan Reinauer <stepan@openbios.org>2010-02-16 00:06:42 +0000
commit99f75793c1efbce8e0cde24d811ed1789a257604 (patch)
tree9bc1098eeee582bdc1492edfa0468a510c6573bf
parent30a4a936cb99dbed9206ca49ae39e897497274b9 (diff)
downloadcoreboot-99f75793c1efbce8e0cde24d811ed1789a257604.tar.xz
fix APCI typos.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5130 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
-rw-r--r--src/arch/i386/include/arch/acpi.h2
-rw-r--r--src/northbridge/amd/amdht/AsPsDefs.h2
2 files changed, 2 insertions, 2 deletions
diff --git a/src/arch/i386/include/arch/acpi.h b/src/arch/i386/include/arch/acpi.h
index 110804b4fa..f28a0e97ea 100644
--- a/src/arch/i386/include/arch/acpi.h
+++ b/src/arch/i386/include/arch/acpi.h
@@ -42,7 +42,7 @@ typedef struct acpi_rsdp {
char signature[8]; /* RSDP signature "RSD PTR" */
u8 checksum; /* checksum of the first 20 bytes */
char oem_id[6]; /* OEM ID, "LXBIOS" */
- u8 revision; /* 0 for APCI 1.0, 2 for ACPI 2.0/3.0 */
+ u8 revision; /* 0 for ACPI 1.0, 2 for ACPI 2.0/3.0 */
u32 rsdt_address; /* physical address of RSDT */
u32 length; /* total length of RSDP (including extended part) */
u64 xsdt_address; /* physical address of XSDT */
diff --git a/src/northbridge/amd/amdht/AsPsDefs.h b/src/northbridge/amd/amdht/AsPsDefs.h
index dfc6821ed9..a0d8c665b7 100644
--- a/src/northbridge/amd/amdht/AsPsDefs.h
+++ b/src/northbridge/amd/amdht/AsPsDefs.h
@@ -82,7 +82,7 @@
#define PCI_DEV_BASE 24 /* System PCI device ID base */
-#define LOCAL_APIC_ID_SHIFT 24 /* Local APCI ID shift bit # */
+#define LOCAL_APIC_ID_SHIFT 24 /* Local APIC ID shift bit # */
#define APIC_CID_SIZE_SHIFT 12 /* ApicCoreIdSize shift bit # */
#define FN_0 0 /* Function 0 */
#define FN_1 1 /* Function 1 */