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authorAbhay Kumar <abhay.kumar@intel.com>2015-07-13 16:12:31 -0700
committerPatrick Georgi <pgeorgi@google.com>2015-07-21 20:07:54 +0200
commit9b71b0e0001aa8fe2b5513a1d7f2d8488b0be782 (patch)
tree61a748cfc9c21052b0d138d0e398fa74dbf2a9a0
parent27d153cabc899ab94ea28d3c7ce5ca56ecefb7ce (diff)
downloadcoreboot-9b71b0e0001aa8fe2b5513a1d7f2d8488b0be782.tar.xz
Braswell: Remove GOP from normal boot mode.
Removing GOP initialization in normal mode since we don't need to show splash screen in normal mode. GOP will get initialized in dev and recovery mode. BRANCH=none BUG=None TEST=Splash screen will come only in dev or recovery mode. Change-Id: Ia5e12cf45d723f2f14c447e29b78119552d5e1ea Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 79d1c877343704ea51143b922d9ac9209be4d4b5 Original-Change-Id: Id5ca99757427206413483d07b4f422b4c0abfa5d Original-Signed-off-by: Abhay <abhay.kumar@intel.com> Original-Reviewed-on: https://chromium-review.googlesource.com/285300 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/10990 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
-rw-r--r--src/soc/intel/common/vbt.c16
1 files changed, 10 insertions, 6 deletions
diff --git a/src/soc/intel/common/vbt.c b/src/soc/intel/common/vbt.c
index 61eeaeb4a0..0e46b70977 100644
--- a/src/soc/intel/common/vbt.c
+++ b/src/soc/intel/common/vbt.c
@@ -24,6 +24,7 @@
#include <lib.h>
#include <soc/intel/common/ramstage.h>
#include <string.h>
+#include <vendorcode/google/chromeos/chromeos.h>
/* Locate VBT and pass it to FSP GOP */
void load_vbt(uint8_t s3_resume, SILICON_INIT_UPD *params)
@@ -36,12 +37,15 @@ void load_vbt(uint8_t s3_resume, SILICON_INIT_UPD *params)
vbt_data = NULL;
printk(BIOS_DEBUG, "S3 resume do not pass VBT to GOP\n");
} else {
- /* Get VBT data */
- vbt_data = fsp_get_vbt(&vbt_len);
- if (vbt_data != NULL)
- printk(BIOS_DEBUG, "Passing VBT to GOP\n");
- else
- printk(BIOS_DEBUG, "VBT not found!\n");
+ if (developer_mode_enabled() || recovery_mode_enabled()) {
+ /* Get VBT data */
+ vbt_data = fsp_get_vbt(&vbt_len);
+ if (vbt_data != NULL)
+ printk(BIOS_DEBUG, "Passing VBT to GOP\n");
+ else
+ printk(BIOS_DEBUG, "VBT not found!\n");
+ } else
+ vbt_data = NULL;
}
params->PcdGraphicsConfigPtr = (u32)vbt_data;
}