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| author | Stefan Reinauer <reinauer@chromium.org> | 2012-07-25 16:10:36 -0700 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2012-08-07 01:05:47 +0200 |
| commit | 9ca1c0af64eeec013e3b4997fb86d334101c7f47 (patch) | |
| tree | 5877547bc305f68400574c05840e9dbe44deec41 | |
| parent | b98d07813d39321e09a18233a565a5fe22944537 (diff) | |
| download | coreboot-9ca1c0af64eeec013e3b4997fb86d334101c7f47.tar.xz | |
Sandy/Ivy Bridge and Cougar/Panther Point: Fix names
The names were set at various times during development, but
the way the code works, you might end up with the wrong name
being displayed in the logs. Instead of doing magic, just
display both names for each component
Change-Id: I1f8ce44d156442f5f7d717e1a2b47ed1218d4527
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/1413
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
| -rw-r--r-- | src/northbridge/intel/sandybridge/northbridge.c | 2 | ||||
| -rw-r--r-- | src/southbridge/intel/bd82x6x/Kconfig | 12 | ||||
| -rw-r--r-- | src/southbridge/intel/bd82x6x/pch.c | 2 |
3 files changed, 2 insertions, 14 deletions
diff --git a/src/northbridge/intel/sandybridge/northbridge.c b/src/northbridge/intel/sandybridge/northbridge.c index b447d52dab..fb0b4cbc6e 100644 --- a/src/northbridge/intel/sandybridge/northbridge.c +++ b/src/northbridge/intel/sandybridge/northbridge.c @@ -511,6 +511,6 @@ static void enable_dev(device_t dev) } struct chip_operations northbridge_intel_sandybridge_ops = { - CHIP_NAME("Intel i7 (Sandybridge) integrated Northbridge") + CHIP_NAME("Intel i7 (SandyBridge/IvyBridge) integrated Northbridge") .enable_dev = enable_dev, }; diff --git a/src/southbridge/intel/bd82x6x/Kconfig b/src/southbridge/intel/bd82x6x/Kconfig index 33dfe9d755..a7d41dcb84 100644 --- a/src/southbridge/intel/bd82x6x/Kconfig +++ b/src/southbridge/intel/bd82x6x/Kconfig @@ -56,15 +56,3 @@ config SERIRQ_CONTINUOUS_MODE operated in continuous mode. endif - -if SOUTHBRIDGE_INTEL_BD82X6X -config PCH_CHIP_NAME - string - default "Cougar Point" -endif - -if SOUTHBRIDGE_INTEL_C216 -config PCH_CHIP_NAME - string - default "Panther Point" -endif diff --git a/src/southbridge/intel/bd82x6x/pch.c b/src/southbridge/intel/bd82x6x/pch.c index 3c448defd4..d8a919dc9d 100644 --- a/src/southbridge/intel/bd82x6x/pch.c +++ b/src/southbridge/intel/bd82x6x/pch.c @@ -405,6 +405,6 @@ void pch_enable(device_t dev) } struct chip_operations southbridge_intel_bd82x6x_ops = { - CHIP_NAME("Intel Series 6/7 (" CONFIG_PCH_CHIP_NAME ") Southbridge") + CHIP_NAME("Intel Series 6/7 (Cougar Point/Panther Point) Southbridge") .enable_dev = pch_enable, }; |