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authorAngel Pons <th3fanbus@gmail.com>2020-11-11 10:26:11 +0100
committerAngel Pons <th3fanbus@gmail.com>2020-11-13 16:11:48 +0000
commit9fe0615eccc254901fa83043f7db23e84c4a3511 (patch)
treeaf933d33592efba7c6f899756ac7f7ac16c5c9cb
parent16433c9c9295e90a3e18c75e42bdb80a059df3b3 (diff)
downloadcoreboot-9fe0615eccc254901fa83043f7db23e84c4a3511.tar.xz
Doc/relnotes/4.13: Add several relevant changes
While some of these have little impact, they are worth mentioning here. Change-Id: Idbf629ae77b8918ff1d93edb7b6c4669bbbe17df Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47444 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
-rw-r--r--Documentation/releases/coreboot-4.13-relnotes.md21
1 files changed, 21 insertions, 0 deletions
diff --git a/Documentation/releases/coreboot-4.13-relnotes.md b/Documentation/releases/coreboot-4.13-relnotes.md
index ddbea81c2c..139fa20865 100644
--- a/Documentation/releases/coreboot-4.13-relnotes.md
+++ b/Documentation/releases/coreboot-4.13-relnotes.md
@@ -13,6 +13,27 @@ Update this document with changes that should be in the release notes.
Significant changes
-------------------
+### Native refcode implementation for Bay Trail
+
+Bay Trail no longer needs a refcode binary to function properly. The refcode
+was reimplemented as coreboot code, which should be functionally equivalent.
+Thus, coreboot only needs to run the MRC.bin to successfully boot Bay Trail.
+
+### Unusual config files to build test more code
+
+There's some new highly-unusual config files, whose only purpose is to coerce
+Jenkins into build-testing several disabled-by-default coreboot config options.
+This prevents them from silently decaying over time because of build failures.
+
+### Initial support for Intel Trusted eXecution Technology
+
+coreboot now supports enabling Intel TXT. Though it's not feature-complete yet,
+the code allows successfully launching tboot, a Measured Launch Environment. It
+was tested on Haswell using an Asrock B85M Pro4 mainboard with TPM 2.0 on LPC.
+Though support for other platforms is still not ready, it is being worked on.
+The Haswell MRC.bin needs to be patched so as to enable DPR. Given that the MRC
+binary cannot be redistributed, the best long-term solution is to replace it.
+
### Hidden PCI devices
This new functionality takes advantage of the existing 'hidden' keyword in the