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| author | Stefan Reinauer <reinauer@chromium.org> | 2012-06-18 15:43:50 -0700 |
|---|---|---|
| committer | Patrick Georgi <patrick@georgi-clan.de> | 2012-07-24 15:54:43 +0200 |
| commit | afcaac2db512c5868db81e2dc038b5ae19ec8b71 (patch) | |
| tree | dd208123cd6a2d9578c632215b3d85c52594cb2c | |
| parent | b405857befbc20dd0be39c1cb6293cea4974fb39 (diff) | |
| download | coreboot-afcaac2db512c5868db81e2dc038b5ae19ec8b71.tar.xz | |
Drop (empty) sandybridge_late_initialization()
The function is empty (a left-over from i945) and should be removed.
Change-Id: I91e573b5e37cb9133ea1037aef7e6daf3c292864
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/1290
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
| -rw-r--r-- | src/mainboard/intel/emeraldlake2/romstage.c | 5 | ||||
| -rw-r--r-- | src/mainboard/samsung/lumpy/romstage.c | 5 | ||||
| -rw-r--r-- | src/mainboard/samsung/stumpy/romstage.c | 5 | ||||
| -rw-r--r-- | src/northbridge/intel/sandybridge/early_init.c | 5 |
4 files changed, 3 insertions, 17 deletions
diff --git a/src/mainboard/intel/emeraldlake2/romstage.c b/src/mainboard/intel/emeraldlake2/romstage.c index 23d20b0610..7a3124269d 100644 --- a/src/mainboard/intel/emeraldlake2/romstage.c +++ b/src/mainboard/intel/emeraldlake2/romstage.c @@ -309,11 +309,8 @@ void main(unsigned long bist) rcba_config(); post_code(0x3d); - /* Initialize the internal PCIe links before we go into stage2 */ - sandybridge_late_initialization(); - - post_code(0x3e); quick_ram_check(); + post_code(0x3e); MCHBAR16(SSKPD) = 0xCAFE; #if CONFIG_EARLY_CBMEM_INIT diff --git a/src/mainboard/samsung/lumpy/romstage.c b/src/mainboard/samsung/lumpy/romstage.c index 3be7c009b7..4bba76ec9d 100644 --- a/src/mainboard/samsung/lumpy/romstage.c +++ b/src/mainboard/samsung/lumpy/romstage.c @@ -327,11 +327,8 @@ void main(unsigned long bist) rcba_config(); post_code(0x3c); - /* Initialize the internal PCIe links before we go into stage2 */ - sandybridge_late_initialization(); - - post_code(0x3e); quick_ram_check(); + post_code(0x3e); MCHBAR16(SSKPD) = 0xCAFE; diff --git a/src/mainboard/samsung/stumpy/romstage.c b/src/mainboard/samsung/stumpy/romstage.c index a6ca033053..58305c894c 100644 --- a/src/mainboard/samsung/stumpy/romstage.c +++ b/src/mainboard/samsung/stumpy/romstage.c @@ -332,11 +332,8 @@ void main(unsigned long bist) rcba_config(); post_code(0x3c); - /* Initialize the internal PCIe links before we go into stage2 */ - sandybridge_late_initialization(); - - post_code(0x3e); quick_ram_check(); + post_code(0x3e); MCHBAR16(SSKPD) = 0xCAFE; #if CONFIG_EARLY_CBMEM_INIT diff --git a/src/northbridge/intel/sandybridge/early_init.c b/src/northbridge/intel/sandybridge/early_init.c index f052fbc3d3..48faf5fb73 100644 --- a/src/northbridge/intel/sandybridge/early_init.c +++ b/src/northbridge/intel/sandybridge/early_init.c @@ -158,8 +158,3 @@ void sandybridge_early_initialization(int chipset_type) sandybridge_setup_graphics(); } - -void sandybridge_late_initialization(void) -{ -} - |