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authorRonald G. Minnich <rminnich@gmail.com>2013-04-30 10:11:30 -0700
committerDavid Hendricks <dhendrix@chromium.org>2013-05-01 20:12:48 +0200
commitc0466d46b7ea511f102eb6e57da59d95bf4ef95f (patch)
tree8cdaee13e73d96c9fc3cc21c94020d1fcdfda125
parent043b823a736d101da46a120cfa883c5c48e3ab81 (diff)
downloadcoreboot-c0466d46b7ea511f102eb6e57da59d95bf4ef95f.tar.xz
ARMV7: add a function to disable MMU entries
It is useful to be able to lock out certain address ranges, NULL being the most important example. void mmu_disable_range(unsigned long start_mb, unsigned long size_mb) will allow us to lock out selected virtual addresses on MiB boundaries. As in other ARM mmu functions, the addresses and quantities are in units of MiB. Change-Id: If516ce955ee2d12c5a409f25acbb5a4b424f699b Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-on: http://review.coreboot.org/3160 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) Reviewed-by: David Hendricks <dhendrix@chromium.org>
-rw-r--r--src/arch/armv7/include/arch/cache.h2
-rw-r--r--src/arch/armv7/lib/mmu.c13
2 files changed, 15 insertions, 0 deletions
diff --git a/src/arch/armv7/include/arch/cache.h b/src/arch/armv7/include/arch/cache.h
index 028cf1808d..d5c3a5b241 100644
--- a/src/arch/armv7/include/arch/cache.h
+++ b/src/arch/armv7/include/arch/cache.h
@@ -303,6 +303,8 @@ enum dcache_policy {
DCACHE_WRITETHROUGH,
};
+/* disable the mmu for a range. Primarily useful to lock out address 0. */
+void mmu_disable_range(unsigned long start_mb, unsigned long size_mb);
/* mmu range configuration (set dcache policy) */
void mmu_config_range(unsigned long start_mb, unsigned long size_mb,
enum dcache_policy policy);
diff --git a/src/arch/armv7/lib/mmu.c b/src/arch/armv7/lib/mmu.c
index 224b566a50..82c735818e 100644
--- a/src/arch/armv7/lib/mmu.c
+++ b/src/arch/armv7/lib/mmu.c
@@ -39,6 +39,19 @@
static uintptr_t ttb_addr;
+void mmu_disable_range(unsigned long start_mb, unsigned long size_mb)
+{
+ unsigned int i;
+ uint32_t *ttb_entry = (uint32_t *)ttb_addr;
+ printk(BIOS_DEBUG, "Disabling: 0x%08lx:0x%08lx\n",
+ start_mb << 20, ((start_mb + size_mb) << 20) - 1);
+
+ for (i = start_mb; i < start_mb + size_mb; i++) {
+ ttb_entry[i] = 0;
+ tlbimvaa(i);
+ }
+}
+
void mmu_config_range(unsigned long start_mb, unsigned long size_mb,
enum dcache_policy policy)
{