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authorEric Biederman <ebiederm@xmission.com>2003-07-12 01:44:36 +0000
committerEric Biederman <ebiederm@xmission.com>2003-07-12 01:44:36 +0000
commitc24a5685516802eaedceff50cce0271f51c80751 (patch)
tree8b3d792064c267c595e0508c35acaf51ed208dcf
parent34cadde255a5fd83fb44830f3eabb6c5b5b23aa9 (diff)
downloadcoreboot-c24a5685516802eaedceff50cce0271f51c80751.tar.xz
- Solo updates
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@952 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
-rw-r--r--src/mainboard/amd/solo/auto.c88
-rw-r--r--src/mainboard/amd/solo/failover.c13
2 files changed, 69 insertions, 32 deletions
diff --git a/src/mainboard/amd/solo/auto.c b/src/mainboard/amd/solo/auto.c
index 94ce39d464..17eb03e7bc 100644
--- a/src/mainboard/amd/solo/auto.c
+++ b/src/mainboard/amd/solo/auto.c
@@ -116,40 +116,78 @@ static void dump_pci_device(unsigned dev)
}
}
-static void dump_spd_registers(void)
+static void dump_spd_registers(const struct mem_controller *ctrl)
{
- unsigned device;
- device = SMBUS_MEM_DEVICE_START;
+ int i;
print_debug("\r\n");
- while(device <= SMBUS_MEM_DEVICE_END) {
- int i;
- print_debug("dimm: ");
- print_debug_hex8(device);
- for(i = 0; i < 256; i++) {
- int status;
- unsigned char byte;
- if ((i & 0xf) == 0) {
- print_debug("\r\n");
- print_debug_hex8(i);
- print_debug(": ");
+ for(i = 0; i < 4; i++) {
+ unsigned device;
+ device = ctrl->channel0[i];
+ if (device) {
+ int j;
+ print_debug("dimm: ");
+ print_debug_hex8(i);
+ print_debug(".0: ");
+ print_debug_hex8(device);
+ for(j = 0; j < 256; j++) {
+ int status;
+ unsigned char byte;
+ if ((j & 0xf) == 0) {
+ print_debug("\r\n");
+ print_debug_hex8(j);
+ print_debug(": ");
+ }
+ status = smbus_read_byte(device, j);
+ if (status < 0) {
+ print_debug("bad device\r\n");
+ break;
+ }
+ byte = status & 0xff;
+ print_debug_hex8(byte);
+ print_debug_char(' ');
}
- status = smbus_read_byte(device, i);
- if (status < 0) {
- print_debug("bad device\r\n");
- break;
+ print_debug("\r\n");
+ }
+ device = ctrl->channel1[i];
+ if (device) {
+ int j;
+ print_debug("dimm: ");
+ print_debug_hex8(i);
+ print_debug(".1: ");
+ print_debug_hex8(device);
+ for(j = 0; j < 256; j++) {
+ int status;
+ unsigned char byte;
+ if ((j & 0xf) == 0) {
+ print_debug("\r\n");
+ print_debug_hex8(j);
+ print_debug(": ");
+ }
+ status = smbus_read_byte(device, j);
+ if (status < 0) {
+ print_debug("bad device\r\n");
+ break;
+ }
+ byte = status & 0xff;
+ print_debug_hex8(byte);
+ print_debug_char(' ');
}
- byte = status & 0xff;
- print_debug_hex8(byte);
- print_debug_char(' ');
+ print_debug("\r\n");
}
- device += SMBUS_MEM_DEVICE_INC;
- print_debug("\r\n");
}
}
static void main(void)
{
+ static const struct mem_controller cpu0 = {
+ .f0 = PCI_DEV(0, 0x18, 0),
+ .f1 = PCI_DEV(0, 0x18, 1),
+ .f2 = PCI_DEV(0, 0x18, 2),
+ .f3 = PCI_DEV(0, 0x18, 3),
+ .channel0 = { (0xa << 3), (0xa << 3)|1, 0, 0 },
+ .channel1 = { 0, 0, 0, 0},
+ };
uart_init();
console_init();
#if 0
@@ -165,9 +203,9 @@ static void main(void)
enumerate_ht_chain();
print_pci_devices();
enable_smbus();
- sdram_initialize();
+ dump_spd_registers(&cpu0);
+ sdram_initialize(&cpu0);
- dump_spd_registers();
dump_pci_device(PCI_DEV(0, 0x18, 2));
/* Check the first 512M */
diff --git a/src/mainboard/amd/solo/failover.c b/src/mainboard/amd/solo/failover.c
index da0f1d0302..017b03862f 100644
--- a/src/mainboard/amd/solo/failover.c
+++ b/src/mainboard/amd/solo/failover.c
@@ -9,15 +9,14 @@
static void main(void)
{
- if (do_normal_boot()) {
- /* Nothing special needs to be done to find bus 0 */
-
- /* Allow the HT devices to be found */
- enumerate_ht_chain();
+ /* Nothing special needs to be done to find bus 0 */
+ /* Allow the HT devices to be found */
+ enumerate_ht_chain();
- /* Setup the 8111 */
- amd8111_enable_rom();
+ /* Setup the 8111 */
+ amd8111_enable_rom();
+ if (do_normal_boot()) {
/* Jump to the normal image */
asm("jmp __normal_image");
}