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| author | Angel Pons <th3fanbus@gmail.com> | 2020-10-26 00:02:31 +0100 |
|---|---|---|
| committer | Michael Niewöhner <foss@mniewoehner.de> | 2020-11-13 13:13:58 +0000 |
| commit | c29d8e046804cc922d84feb092caa9d6088f7b2b (patch) | |
| tree | 465d031531a5d1ac6b3b6e69c025f05026f483e6 | |
| parent | 90f6a31bc2765f989475a30be81b9c075a6fd692 (diff) | |
| download | coreboot-c29d8e046804cc922d84feb092caa9d6088f7b2b.tar.xz | |
nb/intel/haswell/acpi: Do not add PEG devices for LP
Haswell Low Power variants do not have PEG at all.
Change-Id: Ia5577104b00bfc8713b54c3c43f8dcdd3bc367df
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46791
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
| -rw-r--r-- | src/northbridge/intel/haswell/acpi/hostbridge.asl | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/northbridge/intel/haswell/acpi/hostbridge.asl b/src/northbridge/intel/haswell/acpi/hostbridge.asl index 35246b3bc6..28a33d842c 100644 --- a/src/northbridge/intel/haswell/acpi/hostbridge.asl +++ b/src/northbridge/intel/haswell/acpi/hostbridge.asl @@ -200,5 +200,7 @@ Device (PDRC) /* Configurable TDP */ #include "ctdp.asl" +#if !CONFIG(INTEL_LYNXPOINT_LP) /* PCI Express Graphics */ #include "peg.asl" +#endif |