mainboard/amd/amdfam10: Update AMD K10 socket F NVRAM layout files

This removes spurious K8 options and adds appropriate K10 options.
File content taken from the functional K10 ASUS KFSN4-DRE board.

Change-Id: I237bb139056f39f21416268cb52d24c5bc5f111d
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: http://review.coreboot.org/8456
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>

6 files changed, 324 insertions, 91 deletions

diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/cmos.layout b/src/mainboard/amd/serengeti_cheetah_fam10/cmos.layout
index 6565c88a6f..80c07b3544 100644
--- a/src/mainboard/amd/serengeti_cheetah_fam10/cmos.layout
+++ b/src/mainboard/amd/serengeti_cheetah_fam10/cmos.layout
@@ -1,3 +1,25 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2015 Timothy Pearson <tpearson@raptorengineeringinc.com>, Raptor Engineering
+## Copyright (C) 2007 AMD
+## Written by Yinghai Lu <yinghailu@amd.com> for AMD.
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; either version 2 of the License, or
+## (at your option) any later version.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+##
+
 entries
 
 #start-bit length  config config-ID    name
@@ -27,13 +49,15 @@ entries
 384          1       e       4        boot_option
 385          1       e       4        last_boot
 386          1       e       1        ECC_memory
-388          4       r       0        reboot_bits
-392          3       e       5        baud_rate
-395          1       e       1        hw_scrubber
-396          1       e       1        interleave_chip_selects
-397          2       e       8        max_mem_clock
-399          1       e       2        multi_core
-400          1       e       1        power_on_after_fail
+387          1       e       1        ECC_redirection
+389          4       r       0        reboot_bits
+393          3       e       5        baud_rate
+396          5       e       10       ecc_scrub_rate
+401          1       e       1        interleave_chip_selects
+402          1       e       1        interleave_nodes
+403          1       e       1        interleave_memory_channels
+404          2       e       8        max_mem_clock
+406          1       e       2        multi_core
 412          4       e       6        debug_level
 416          4       e       7        boot_first
 420          4       e       7        boot_second
@@ -43,6 +67,7 @@ entries
 440          4       e       9        slow_cpu
 444          1       e       1        nmi
 445          1       e       1        iommu
+446          1       e       1        power_on_after_fail
 728        256       h       0        user_data
 984         16       h       0        check_sum
 # Reserve the extended AMD configuration registers
@@ -67,10 +92,15 @@ enumerations
 5     5     4800
 5     6     2400
 5     7     1200
-6     6     Notice
-6     7     Info
-6     8     Debug
-6     9     Spew
+6     0     Emergency
+6     1     Alert
+6     2     Critical
+6     3     Error
+6     4     Warning
+6     5     Notice
+6     6     Information
+6     7     Debug
+6     8     Spew
 7     0     Network
 7     1     HDD
 7     2     Floppy
@@ -78,10 +108,10 @@ enumerations
 7     9     Fallback_HDD
 7     10    Fallback_Floppy
 #7     3     ROM
-8     0     400Mhz
-8     1     333Mhz
-8     2     266Mhz
-8     3     200Mhz
+8     0     DDR2-800
+8     1     DDR2-667
+8     2     DDR2-533
+8     3     DDR2-400
 9     0     off
 9     1     87.5%
 9     2     75.0%
@@ -90,6 +120,29 @@ enumerations
 9     5     37.5%
 9     6     25.0%
 9     7     12.5%
+10    0     Disabled
+10    1     40ns
+10    2     80ns
+10    3     160ns
+10    4     320ns
+10    5     640ns
+10    6     1.28us
+10    7     2.56us
+10    8     5.12us
+10    9     10.2us
+10    10    20.5us
+10    11    41us
+10    12    81.9us
+10    13    163.8us
+10    14    327.7us
+10    15    655.4us
+10    16    1.31ms
+10    17    2.62ms
+10    18    5.24ms
+10    19    10.49ms
+10    20    20.97sms
+10    21    42ms
+10    22    84ms
 
 checksums
 
diff --git a/src/mainboard/hp/dl165_g6_fam10/cmos.layout b/src/mainboard/hp/dl165_g6_fam10/cmos.layout
index c5e27fef8e..8d1301d3e3 100644
--- a/src/mainboard/hp/dl165_g6_fam10/cmos.layout
+++ b/src/mainboard/hp/dl165_g6_fam10/cmos.layout
@@ -1,3 +1,25 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2015 Timothy Pearson <tpearson@raptorengineeringinc.com>, Raptor Engineering
+## Copyright (C) 2007 AMD
+## Written by Yinghai Lu <yinghailu@amd.com> for AMD.
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; either version 2 of the License, or
+## (at your option) any later version.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+##
+
 entries
 
 #start-bit length  config config-ID    name
@@ -27,19 +49,21 @@ entries
 384          1       e       4        boot_option
 385          1       e       4        last_boot
 386          1       e       1        ECC_memory
-388          4       r       0        reboot_bits
-392          3       e       5        baud_rate
-395          1       e       1        hw_scrubber
-396          1       e       1        interleave_chip_selects
-397          2       e       8        max_mem_clock
-399         1       e       2        multi_core
-400          1       e       1        power_on_after_fail
+387          1       e       1        ECC_redirection
+389          4       r       0        reboot_bits
+393          3       e       5        baud_rate
+396          5       e       10       ecc_scrub_rate
+401          1       e       1        interleave_chip_selects
+402          1       e       1        interleave_nodes
+403          1       e       1        interleave_memory_channels
+404          2       e       8        max_mem_clock
+406          1       e       2        multi_core
 412          4       e       6        debug_level
 416          4       e       7        boot_first
 420          4       e       7        boot_second
 424          4       e       7        boot_third
 428          4       h       0        boot_index
-432         8       h       0        boot_countdown
+432          8       h       0        boot_countdown
 440          4       e       9        slow_cpu
 444          1       e       1        nmi
 445          1       e       1        iommu
@@ -67,10 +91,15 @@ enumerations
 5     5     4800
 5     6     2400
 5     7     1200
-6     6     Notice
-6     7     Info
-6     8     Debug
-6     9     Spew
+6     0     Emergency
+6     1     Alert
+6     2     Critical
+6     3     Error
+6     4     Warning
+6     5     Notice
+6     6     Information
+6     7     Debug
+6     8     Spew
 7     0     Network
 7     1     HDD
 7     2     Floppy
@@ -78,10 +107,10 @@ enumerations
 7     9     Fallback_HDD
 7     10    Fallback_Floppy
 #7     3     ROM
-8     0     400Mhz
-8     1     333Mhz
-8     2     266Mhz
-8     3     200Mhz
+8     0     DDR2-800
+8     1     DDR2-667
+8     2     DDR2-533
+8     3     DDR2-400
 9     0     off
 9     1     87.5%
 9     2     75.0%
@@ -90,6 +119,29 @@ enumerations
 9     5     37.5%
 9     6     25.0%
 9     7     12.5%
+10    0     Disabled
+10    1     40ns
+10    2     80ns
+10    3     160ns
+10    4     320ns
+10    5     640ns
+10    6     1.28us
+10    7     2.56us
+10    8     5.12us
+10    9     10.2us
+10    10    20.5us
+10    11    41us
+10    12    81.9us
+10    13    163.8us
+10    14    327.7us
+10    15    655.4us
+10    16    1.31ms
+10    17    2.62ms
+10    18    5.24ms
+10    19    10.49ms
+10    20    20.97sms
+10    21    42ms
+10    22    84ms
 
 checksums
 
diff --git a/src/mainboard/msi/ms9652_fam10/cmos.layout b/src/mainboard/msi/ms9652_fam10/cmos.layout
index 1f1cab02ee..80c07b3544 100644
--- a/src/mainboard/msi/ms9652_fam10/cmos.layout
+++ b/src/mainboard/msi/ms9652_fam10/cmos.layout
@@ -1,6 +1,7 @@
 ##
 ## This file is part of the coreboot project.
 ##
+## Copyright (C) 2015 Timothy Pearson <tpearson@raptorengineeringinc.com>, Raptor Engineering
 ## Copyright (C) 2007 AMD
 ## Written by Yinghai Lu <yinghailu@amd.com> for AMD.
 ##
@@ -48,13 +49,15 @@ entries
 384          1       e       4        boot_option
 385          1       e       4        last_boot
 386          1       e       1        ECC_memory
-388          4       r       0        reboot_bits
-392          3       e       5        baud_rate
-395          1       e       1        hw_scrubber
-396          1       e       1        interleave_chip_selects
-397          2       e       8        max_mem_clock
-399          1       e       2        multi_core
-400          1       e       1        power_on_after_fail
+387          1       e       1        ECC_redirection
+389          4       r       0        reboot_bits
+393          3       e       5        baud_rate
+396          5       e       10       ecc_scrub_rate
+401          1       e       1        interleave_chip_selects
+402          1       e       1        interleave_nodes
+403          1       e       1        interleave_memory_channels
+404          2       e       8        max_mem_clock
+406          1       e       2        multi_core
 412          4       e       6        debug_level
 416          4       e       7        boot_first
 420          4       e       7        boot_second
@@ -64,6 +67,7 @@ entries
 440          4       e       9        slow_cpu
 444          1       e       1        nmi
 445          1       e       1        iommu
+446          1       e       1        power_on_after_fail
 728        256       h       0        user_data
 984         16       h       0        check_sum
 # Reserve the extended AMD configuration registers
@@ -88,10 +92,15 @@ enumerations
 5     5     4800
 5     6     2400
 5     7     1200
-6     6     Notice
-6     7     Info
-6     8     Debug
-6     9     Spew
+6     0     Emergency
+6     1     Alert
+6     2     Critical
+6     3     Error
+6     4     Warning
+6     5     Notice
+6     6     Information
+6     7     Debug
+6     8     Spew
 7     0     Network
 7     1     HDD
 7     2     Floppy
@@ -99,10 +108,10 @@ enumerations
 7     9     Fallback_HDD
 7     10    Fallback_Floppy
 #7     3     ROM
-8     0     200Mhz
-8     1     166Mhz
-8     2     133Mhz
-8     3     100Mhz
+8     0     DDR2-800
+8     1     DDR2-667
+8     2     DDR2-533
+8     3     DDR2-400
 9     0     off
 9     1     87.5%
 9     2     75.0%
@@ -111,6 +120,29 @@ enumerations
 9     5     37.5%
 9     6     25.0%
 9     7     12.5%
+10    0     Disabled
+10    1     40ns
+10    2     80ns
+10    3     160ns
+10    4     320ns
+10    5     640ns
+10    6     1.28us
+10    7     2.56us
+10    8     5.12us
+10    9     10.2us
+10    10    20.5us
+10    11    41us
+10    12    81.9us
+10    13    163.8us
+10    14    327.7us
+10    15    655.4us
+10    16    1.31ms
+10    17    2.62ms
+10    18    5.24ms
+10    19    10.49ms
+10    20    20.97sms
+10    21    42ms
+10    22    84ms
 
 checksums
 
diff --git a/src/mainboard/supermicro/h8dmr_fam10/cmos.layout b/src/mainboard/supermicro/h8dmr_fam10/cmos.layout
index 1f1cab02ee..80c07b3544 100644
--- a/src/mainboard/supermicro/h8dmr_fam10/cmos.layout
+++ b/src/mainboard/supermicro/h8dmr_fam10/cmos.layout
@@ -1,6 +1,7 @@
 ##
 ## This file is part of the coreboot project.
 ##
+## Copyright (C) 2015 Timothy Pearson <tpearson@raptorengineeringinc.com>, Raptor Engineering
 ## Copyright (C) 2007 AMD
 ## Written by Yinghai Lu <yinghailu@amd.com> for AMD.
 ##
@@ -48,13 +49,15 @@ entries
 384          1       e       4        boot_option
 385          1       e       4        last_boot
 386          1       e       1        ECC_memory
-388          4       r       0        reboot_bits
-392          3       e       5        baud_rate
-395          1       e       1        hw_scrubber
-396          1       e       1        interleave_chip_selects
-397          2       e       8        max_mem_clock
-399          1       e       2        multi_core
-400          1       e       1        power_on_after_fail
+387          1       e       1        ECC_redirection
+389          4       r       0        reboot_bits
+393          3       e       5        baud_rate
+396          5       e       10       ecc_scrub_rate
+401          1       e       1        interleave_chip_selects
+402          1       e       1        interleave_nodes
+403          1       e       1        interleave_memory_channels
+404          2       e       8        max_mem_clock
+406          1       e       2        multi_core
 412          4       e       6        debug_level
 416          4       e       7        boot_first
 420          4       e       7        boot_second
@@ -64,6 +67,7 @@ entries
 440          4       e       9        slow_cpu
 444          1       e       1        nmi
 445          1       e       1        iommu
+446          1       e       1        power_on_after_fail
 728        256       h       0        user_data
 984         16       h       0        check_sum
 # Reserve the extended AMD configuration registers
@@ -88,10 +92,15 @@ enumerations
 5     5     4800
 5     6     2400
 5     7     1200
-6     6     Notice
-6     7     Info
-6     8     Debug
-6     9     Spew
+6     0     Emergency
+6     1     Alert
+6     2     Critical
+6     3     Error
+6     4     Warning
+6     5     Notice
+6     6     Information
+6     7     Debug
+6     8     Spew
 7     0     Network
 7     1     HDD
 7     2     Floppy
@@ -99,10 +108,10 @@ enumerations
 7     9     Fallback_HDD
 7     10    Fallback_Floppy
 #7     3     ROM
-8     0     200Mhz
-8     1     166Mhz
-8     2     133Mhz
-8     3     100Mhz
+8     0     DDR2-800
+8     1     DDR2-667
+8     2     DDR2-533
+8     3     DDR2-400
 9     0     off
 9     1     87.5%
 9     2     75.0%
@@ -111,6 +120,29 @@ enumerations
 9     5     37.5%
 9     6     25.0%
 9     7     12.5%
+10    0     Disabled
+10    1     40ns
+10    2     80ns
+10    3     160ns
+10    4     320ns
+10    5     640ns
+10    6     1.28us
+10    7     2.56us
+10    8     5.12us
+10    9     10.2us
+10    10    20.5us
+10    11    41us
+10    12    81.9us
+10    13    163.8us
+10    14    327.7us
+10    15    655.4us
+10    16    1.31ms
+10    17    2.62ms
+10    18    5.24ms
+10    19    10.49ms
+10    20    20.97sms
+10    21    42ms
+10    22    84ms
 
 checksums
 
diff --git a/src/mainboard/supermicro/h8qme_fam10/cmos.layout b/src/mainboard/supermicro/h8qme_fam10/cmos.layout
index 1f1cab02ee..80c07b3544 100644
--- a/src/mainboard/supermicro/h8qme_fam10/cmos.layout
+++ b/src/mainboard/supermicro/h8qme_fam10/cmos.layout
@@ -1,6 +1,7 @@
 ##
 ## This file is part of the coreboot project.
 ##
+## Copyright (C) 2015 Timothy Pearson <tpearson@raptorengineeringinc.com>, Raptor Engineering
 ## Copyright (C) 2007 AMD
 ## Written by Yinghai Lu <yinghailu@amd.com> for AMD.
 ##
@@ -48,13 +49,15 @@ entries
 384          1       e       4        boot_option
 385          1       e       4        last_boot
 386          1       e       1        ECC_memory
-388          4       r       0        reboot_bits
-392          3       e       5        baud_rate
-395          1       e       1        hw_scrubber
-396          1       e       1        interleave_chip_selects
-397          2       e       8        max_mem_clock
-399          1       e       2        multi_core
-400          1       e       1        power_on_after_fail
+387          1       e       1        ECC_redirection
+389          4       r       0        reboot_bits
+393          3       e       5        baud_rate
+396          5       e       10       ecc_scrub_rate
+401          1       e       1        interleave_chip_selects
+402          1       e       1        interleave_nodes
+403          1       e       1        interleave_memory_channels
+404          2       e       8        max_mem_clock
+406          1       e       2        multi_core
 412          4       e       6        debug_level
 416          4       e       7        boot_first
 420          4       e       7        boot_second
@@ -64,6 +67,7 @@ entries
 440          4       e       9        slow_cpu
 444          1       e       1        nmi
 445          1       e       1        iommu
+446          1       e       1        power_on_after_fail
 728        256       h       0        user_data
 984         16       h       0        check_sum
 # Reserve the extended AMD configuration registers
@@ -88,10 +92,15 @@ enumerations
 5     5     4800
 5     6     2400
 5     7     1200
-6     6     Notice
-6     7     Info
-6     8     Debug
-6     9     Spew
+6     0     Emergency
+6     1     Alert
+6     2     Critical
+6     3     Error
+6     4     Warning
+6     5     Notice
+6     6     Information
+6     7     Debug
+6     8     Spew
 7     0     Network
 7     1     HDD
 7     2     Floppy
@@ -99,10 +108,10 @@ enumerations
 7     9     Fallback_HDD
 7     10    Fallback_Floppy
 #7     3     ROM
-8     0     200Mhz
-8     1     166Mhz
-8     2     133Mhz
-8     3     100Mhz
+8     0     DDR2-800
+8     1     DDR2-667
+8     2     DDR2-533
+8     3     DDR2-400
 9     0     off
 9     1     87.5%
 9     2     75.0%
@@ -111,6 +120,29 @@ enumerations
 9     5     37.5%
 9     6     25.0%
 9     7     12.5%
+10    0     Disabled
+10    1     40ns
+10    2     80ns
+10    3     160ns
+10    4     320ns
+10    5     640ns
+10    6     1.28us
+10    7     2.56us
+10    8     5.12us
+10    9     10.2us
+10    10    20.5us
+10    11    41us
+10    12    81.9us
+10    13    163.8us
+10    14    327.7us
+10    15    655.4us
+10    16    1.31ms
+10    17    2.62ms
+10    18    5.24ms
+10    19    10.49ms
+10    20    20.97sms
+10    21    42ms
+10    22    84ms
 
 checksums
 
diff --git a/src/mainboard/tyan/s2912_fam10/cmos.layout b/src/mainboard/tyan/s2912_fam10/cmos.layout
index 1f1cab02ee..80c07b3544 100644
--- a/src/mainboard/tyan/s2912_fam10/cmos.layout
+++ b/src/mainboard/tyan/s2912_fam10/cmos.layout
@@ -1,6 +1,7 @@
 ##
 ## This file is part of the coreboot project.
 ##
+## Copyright (C) 2015 Timothy Pearson <tpearson@raptorengineeringinc.com>, Raptor Engineering
 ## Copyright (C) 2007 AMD
 ## Written by Yinghai Lu <yinghailu@amd.com> for AMD.
 ##
@@ -48,13 +49,15 @@ entries
 384          1       e       4        boot_option
 385          1       e       4        last_boot
 386          1       e       1        ECC_memory
-388          4       r       0        reboot_bits
-392          3       e       5        baud_rate
-395          1       e       1        hw_scrubber
-396          1       e       1        interleave_chip_selects
-397          2       e       8        max_mem_clock
-399          1       e       2        multi_core
-400          1       e       1        power_on_after_fail
+387          1       e       1        ECC_redirection
+389          4       r       0        reboot_bits
+393          3       e       5        baud_rate
+396          5       e       10       ecc_scrub_rate
+401          1       e       1        interleave_chip_selects
+402          1       e       1        interleave_nodes
+403          1       e       1        interleave_memory_channels
+404          2       e       8        max_mem_clock
+406          1       e       2        multi_core
 412          4       e       6        debug_level
 416          4       e       7        boot_first
 420          4       e       7        boot_second
@@ -64,6 +67,7 @@ entries
 440          4       e       9        slow_cpu
 444          1       e       1        nmi
 445          1       e       1        iommu
+446          1       e       1        power_on_after_fail
 728        256       h       0        user_data
 984         16       h       0        check_sum
 # Reserve the extended AMD configuration registers
@@ -88,10 +92,15 @@ enumerations
 5     5     4800
 5     6     2400
 5     7     1200
-6     6     Notice
-6     7     Info
-6     8     Debug
-6     9     Spew
+6     0     Emergency
+6     1     Alert
+6     2     Critical
+6     3     Error
+6     4     Warning
+6     5     Notice
+6     6     Information
+6     7     Debug
+6     8     Spew
 7     0     Network
 7     1     HDD
 7     2     Floppy
@@ -99,10 +108,10 @@ enumerations
 7     9     Fallback_HDD
 7     10    Fallback_Floppy
 #7     3     ROM
-8     0     200Mhz
-8     1     166Mhz
-8     2     133Mhz
-8     3     100Mhz
+8     0     DDR2-800
+8     1     DDR2-667
+8     2     DDR2-533
+8     3     DDR2-400
 9     0     off
 9     1     87.5%
 9     2     75.0%
@@ -111,6 +120,29 @@ enumerations
 9     5     37.5%
 9     6     25.0%
 9     7     12.5%
+10    0     Disabled
+10    1     40ns
+10    2     80ns
+10    3     160ns
+10    4     320ns
+10    5     640ns
+10    6     1.28us
+10    7     2.56us
+10    8     5.12us
+10    9     10.2us
+10    10    20.5us
+10    11    41us
+10    12    81.9us
+10    13    163.8us
+10    14    327.7us
+10    15    655.4us
+10    16    1.31ms
+10    17    2.62ms
+10    18    5.24ms
+10    19    10.49ms
+10    20    20.97sms
+10    21    42ms
+10    22    84ms
 
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