diff options
| author | Vadim Bendebury <vbendeb@chromium.org> | 2014-08-01 17:36:45 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2015-03-28 08:48:08 +0100 |
| commit | c6d30405f2c3beb47690745eeae4684e18d4be05 (patch) | |
| tree | b6ee59bee3cb0e8c8b084ba02e09ce087bf3d8d9 | |
| parent | d9becd2183da9f4174e2dc2d686ad5a66c4e4e22 (diff) | |
| download | coreboot-c6d30405f2c3beb47690745eeae4684e18d4be05.tar.xz | |
storm: supply vboot GPIO settings in coreboot table
Storm provides three real and two fake gpios. To keep things simple,
define them all as active low and provide appropriate values for the
fake ones.
BUG=chrome-os-partner:30705
TEST=with the appropriate depthcharge change booted proto0, observed
appropriate behavior following the dev switch setting
Change-Id: I248b90ee06d226a223b6fc0993f209acdd58c77d
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: d48d1dcc88df0c1bd4c50f14dd2e7cd1dd4fba5d
Original-Change-Id: Icb7fb55949fa97ead9d19f0da76392ee63bbb5b8
Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/210922
Reviewed-on: http://review.coreboot.org/9117
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
| -rw-r--r-- | src/mainboard/google/storm/mainboard.c | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/src/mainboard/google/storm/mainboard.c b/src/mainboard/google/storm/mainboard.c index 94f3a92215..8982f919ae 100644 --- a/src/mainboard/google/storm/mainboard.c +++ b/src/mainboard/google/storm/mainboard.c @@ -19,7 +19,11 @@ #include <arch/cache.h> #include <boot/coreboot_tables.h> +#include <console/console.h> #include <device/device.h> +#include <delay.h> +#include <string.h> + #include <soc/qualcomm/ipq806x/include/clock.h> #include <soc/qualcomm/ipq806x/include/gpio.h> #include <soc/qualcomm/ipq806x/include/usb.h> @@ -93,3 +97,27 @@ void lb_board(struct lb_header *header) dma->range_start = CONFIG_DRAM_DMA_START; dma->range_size = CONFIG_DRAM_DMA_SIZE; } + +static int read_gpio(gpio_t gpio_num) +{ + gpio_tlmm_config_set(gpio_num, GPIO_FUNC_DISABLE, + GPIO_NO_PULL, GPIO_2MA, GPIO_DISABLE); + udelay(10); /* Should be enough to settle. */ + return gpio_get_in_value(gpio_num); +} + +void fill_lb_gpios(struct lb_gpios *gpios) +{ + struct lb_gpio *gpio; + const int GPIO_COUNT = 5; + + gpios->size = sizeof(*gpios) + (GPIO_COUNT * sizeof(struct lb_gpio)); + gpios->count = GPIO_COUNT; + + gpio = gpios->gpios; + fill_lb_gpio(gpio++, 15, ACTIVE_LOW, "developer", read_gpio(15)); + fill_lb_gpio(gpio++, 16, ACTIVE_LOW, "recovery", read_gpio(16)); + fill_lb_gpio(gpio++, 17, ACTIVE_LOW, "write protect", read_gpio(17)); + fill_lb_gpio(gpio++, -1, ACTIVE_LOW, "power", 1); + fill_lb_gpio(gpio++, -1, ACTIVE_LOW, "lid", 0); +} |