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authorMartin Roth <gaumless@gmail.com>2015-06-05 21:00:07 -0600
committerMartin Roth <gaumless@gmail.com>2015-06-07 22:11:07 +0200
commitcdaf331098ff1ab0e8f5e7d5a13674a3e1044100 (patch)
tree50611a10a2d11d0b416c45a88856e0c13bda1854
parent62805e60c093eab78edfe2a544e1580691b9887c (diff)
downloadcoreboot-cdaf331098ff1ab0e8f5e7d5a13674a3e1044100.tar.xz
Removed unused SOUTHBRIDGE_INTEL_FSP_I89XX expressions
The SOUTHBRIDGE_INTEL_FSP_I89XX symbols are never defined in any Kconfig file or used anywhere in the existing coreboot tree. Removing them as unnecessary. If the southbridge code ever gets uploaded, these can be re-added at that point. Change-Id: I36f9ca8e25e08ce154d10ea9d764a73095590244 Signed-off-by: Martin Roth <gaumless@gmail.com> Reviewed-on: http://review.coreboot.org/10436 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
-rw-r--r--src/northbridge/intel/fsp_sandybridge/fsp/Kconfig2
-rw-r--r--src/vendorcode/intel/Kconfig1
2 files changed, 0 insertions, 3 deletions
diff --git a/src/northbridge/intel/fsp_sandybridge/fsp/Kconfig b/src/northbridge/intel/fsp_sandybridge/fsp/Kconfig
index 2456a42676..82e5361505 100644
--- a/src/northbridge/intel/fsp_sandybridge/fsp/Kconfig
+++ b/src/northbridge/intel/fsp_sandybridge/fsp/Kconfig
@@ -21,12 +21,10 @@ config SANDYBRIDGE_FSP_SPECIFIC_OPTIONS
def_bool y
select PLATFORM_USES_FSP1_0
select USE_GENERIC_FSP_CAR_INC
- select FSP_USES_UPD if SOUTHBRIDGE_INTEL_FSP_I89XX
config FSP_FILE
string
default "../intel/fsp/ivybridge_bd82x6x/FvFsp.bin" if SOUTHBRIDGE_INTEL_FSP_BD82X6X
- default "../intel/fsp/ivybridge_i89xx/FvFsp.bin" if SOUTHBRIDGE_INTEL_FSP_I89XX
help
The path and filename of the Intel FSP binary for this platform.
diff --git a/src/vendorcode/intel/Kconfig b/src/vendorcode/intel/Kconfig
index 8e1b7437e8..0da26f0fbd 100644
--- a/src/vendorcode/intel/Kconfig
+++ b/src/vendorcode/intel/Kconfig
@@ -20,6 +20,5 @@
config FSP_VENDORCODE_HEADER_PATH
string
default "fsp1_0/ivybridge_bd82x6x" if CPU_INTEL_FSP_MODEL_306AX && SOUTHBRIDGE_INTEL_FSP_BD82X6X
- default "fsp1_0/ivybridge_i89xx" if CPU_INTEL_FSP_MODEL_306AX && SOUTHBRIDGE_INTEL_FSP_I89XX
default "fsp1_0/baytrail" if SOC_INTEL_FSP_BAYTRAIL
default "fsp1_0/rangeley" if CPU_INTEL_FSP_MODEL_406DX