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authorVadim Bendebury <vbendeb@chromium.org>2014-10-28 18:23:28 -0700
committerStefan Reinauer <stefan.reinauer@coreboot.org>2015-04-10 20:34:11 +0200
commitd0daebafde0b41275ab421585e4754c729848afe (patch)
tree0cf224aa03647c293ccf7f6ffa9349692a84675d
parentbae8608435a1e7ff856f620a77666fed2a6c10fa (diff)
downloadcoreboot-d0daebafde0b41275ab421585e4754c729848afe.tar.xz
urara: support building with CHROMEOS enabled
Chrome OS support needs to be enabled on urara. This patch adds a placeholder file to keep Chrome OS support code. BRANCH=none BUG=chrome-os-partner:31438 TEST=none Change-Id: I0731469934f04bd68914f09db5d64758c5d01545 Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Original-Commit-Id: 169c62c9443c3b9fcab23b312b5cb18ba79437f4 Original-Change-Id: I8ec328d4f965ff80d17847f2f8ce62b402c42a46 Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/226179 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/9466 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
-rw-r--r--src/mainboard/google/urara/Kconfig1
-rw-r--r--src/mainboard/google/urara/Makefile.inc1
-rw-r--r--src/mainboard/google/urara/chromeos.c28
3 files changed, 30 insertions, 0 deletions
diff --git a/src/mainboard/google/urara/Kconfig b/src/mainboard/google/urara/Kconfig
index 26add608dc..1386bc8f25 100644
--- a/src/mainboard/google/urara/Kconfig
+++ b/src/mainboard/google/urara/Kconfig
@@ -25,6 +25,7 @@ config BOARD_SPECIFIC_OPTIONS
def_bool y
select BOARD_ROMSIZE_KB_512
select BOOTBLOCK_CONSOLE
+ select MAINBOARD_HAS_CHROMEOS
select CONFIG_SPI_FLASH_WINBOND
select CPU_IMGTEC_PISTACHIO
select COMMON_CBFS_SPI_WRAPPER
diff --git a/src/mainboard/google/urara/Makefile.inc b/src/mainboard/google/urara/Makefile.inc
index 5a9dc0216f..2835a4b87f 100644
--- a/src/mainboard/google/urara/Makefile.inc
+++ b/src/mainboard/google/urara/Makefile.inc
@@ -19,6 +19,7 @@
# MA 02110-1301 USA
#
+ramstage-$(CONFIG_CHROMEOS) += chromeos.c
ramstage-y += mainboard.c
bootblock-y += memlayout.ld
diff --git a/src/mainboard/google/urara/chromeos.c b/src/mainboard/google/urara/chromeos.c
new file mode 100644
index 0000000000..cc8c79bfe1
--- /dev/null
+++ b/src/mainboard/google/urara/chromeos.c
@@ -0,0 +1,28 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2014 Google Technologies
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#include <boot/coreboot_tables.h>
+#include <console/console.h>
+#include <gpio.h>
+
+
+void fill_lb_gpios(struct lb_gpios *gpios)
+{
+ printk(BIOS_ERR, "%s unsupported, but called\n", __func__);
+}