summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorSven Schnelle <svens@stackframe.org>2011-10-23 16:36:22 +0200
committerSven Schnelle <svens@stackframe.org>2011-10-25 20:13:30 +0200
commitd2bc117f7957155da9587de6a4deebb6a101f2c6 (patch)
tree077eab86ae92f041de16bc4b648f4424cc980295
parentfe40c5067e8698b4322712a4c06b6665ae153170 (diff)
downloadcoreboot-d2bc117f7957155da9587de6a4deebb6a101f2c6.tar.xz
T60: enable C4onC3 mode
It is safe to enable this setting on these Boards. Change-Id: Iaa7377117743d18a95c496c25abf9fb4a1b20ad9 Signed-off-by: Sven Schnelle <svens@stackframe.org> Reviewed-on: http://review.coreboot.org/330 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
-rw-r--r--src/mainboard/lenovo/t60/devicetree.cb2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/mainboard/lenovo/t60/devicetree.cb b/src/mainboard/lenovo/t60/devicetree.cb
index 4d0476f5b3..dba3fdda02 100644
--- a/src/mainboard/lenovo/t60/devicetree.cb
+++ b/src/mainboard/lenovo/t60/devicetree.cb
@@ -68,6 +68,8 @@ chip northbridge/intel/i945
register "gpe0_en" = "0x11000006"
register "alt_gp_smi_en" = "0x1000"
+ register "c4onc3_enable" = "1"
+
device pci 1b.0 on # Audio Cnotroller
subsystemid 0x17aa 0x2010
end