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authorBen Gardner <gardner.ben@gmail.com>2015-12-02 12:42:28 -0600
committerMartin Roth <martinroth@google.com>2015-12-06 18:50:30 +0100
commitd347f6cb0b788c5e887b15849ad789ba30833558 (patch)
tree708eede7c39ba4091dbbd09eb0ec8bd0948b7189
parenteca844b9490d840377e2d0c54dffc1271758a62b (diff)
downloadcoreboot-d347f6cb0b788c5e887b15849ad789ba30833558.tar.xz
fsp_baytrail: Add missing newline to eMMC Mode log
Change-Id: Icd697053c2ea1a2ac42bdd045134d223d93d5403 Signed-off-by: Ben Gardner <gardner.ben@gmail.com> Reviewed-on: https://review.coreboot.org/12623 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Martin Roth <martinroth@google.com>
-rwxr-xr-xsrc/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c b/src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c
index 471740919e..462d007767 100755
--- a/src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c
+++ b/src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c
@@ -209,7 +209,7 @@ static void ConfigureDefaultUpdData(FSP_INFO_HEADER *FspInfo, UPD_DATA_REGION *U
acpi_pci_mode_strings[UpdData->PcdEnableLpe]);
if (UpdData->PcdeMMCBootMode < sizeof(emmc_mode_strings) / sizeof (char *))
- printk(FSP_INFO_LEVEL, "eMMC Mode:\t\t%s",
+ printk(FSP_INFO_LEVEL, "eMMC Mode:\t\t%s\n",
emmc_mode_strings[UpdData->PcdeMMCBootMode]);
if (UpdData->PcdEnableSata)