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authorNeil Chen <neilc%nvidia.com@gtempaccount.com>2015-02-04 13:37:45 +0800
committerPatrick Georgi <pgeorgi@google.com>2015-04-17 09:27:17 +0200
commitd73a8e5d3eb87722d9590f8c18bf3d1fbf0aaae9 (patch)
tree15911f86a230ab4649a5bc8a45c29f51406be33f
parente1298dfa0727e0814855d26b080debca107195b1 (diff)
downloadcoreboot-d73a8e5d3eb87722d9590f8c18bf3d1fbf0aaae9.tar.xz
blaze: add new Hynix 2GB BCT
- Hynix H5TC4G63CFR-PBA, ramcode = 5 BUG=chrome-os-partner:34695 TEST=emerged coreboot, booted successfully into kernel. Change-Id: I53f9ebd9c38c645d1eb8b685d39e8beb55bd3c6a Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: ee6fdcc28402fe324d08b713498488d863d1d30f Original-Change-Id: I829d4e1f992eadd445c313729eb4bca5ce602f53 Original-Reviewed-on: https://chromium-review.googlesource.com/245947 Original-Reviewed-by: Neil Chen <neilc%nvidia.com@gtempaccount.com> Original-Tested-by: Neil Chen <neilc%nvidia.com@gtempaccount.com> Original-Reviewed-by: Tom Warren <twarren@nvidia.com> Original-Reviewed-by: David Hendricks <dhendrix@chromium.org> Original-Commit-Queue: Neil Chen <neilc%nvidia.com@gtempaccount.com> Reviewed-on: http://review.coreboot.org/9736 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat
-rw-r--r--src/mainboard/google/nyan_blaze/bct/sdram-hynix-C-2GB-792.inc311
-rw-r--r--src/mainboard/google/nyan_blaze/sdram_configs.c2
2 files changed, 312 insertions, 1 deletions
diff --git a/src/mainboard/google/nyan_blaze/bct/sdram-hynix-C-2GB-792.inc b/src/mainboard/google/nyan_blaze/bct/sdram-hynix-C-2GB-792.inc
new file mode 100644
index 0000000000..ab2317475d
--- /dev/null
+++ b/src/mainboard/google/nyan_blaze/bct/sdram-hynix-C-2GB-792.inc
@@ -0,0 +1,311 @@
+{ /* generated Hynix_2GB_H5TC4G63CFR_792MHz_0106_Modify.cfg; do not edit. */
+ .MemoryType = NvBootMemoryType_Ddr3,
+ .PllMInputDivider = 0x00000001,
+ .PllMFeedbackDivider = 0x00000042,
+ .PllMStableTime = 0x0000012c,
+ .PllMSetupControl = 0x00000000,
+ .PllMSelectDiv2 = 0x00000000,
+ .PllMPDLshiftPh45 = 0x00000001,
+ .PllMPDLshiftPh90 = 0x00000001,
+ .PllMPDLshiftPh135 = 0x00000001,
+ .PllMKCP = 0x00000000,
+ .PllMKVCO = 0x00000000,
+ .EmcBctSpare0 = 0x00000000,
+ .EmcBctSpare1 = 0x00000000,
+ .EmcBctSpare2 = 0x00000000,
+ .EmcBctSpare3 = 0x00000000,
+ .EmcBctSpare4 = 0x00000000,
+ .EmcBctSpare5 = 0x00000000,
+ .EmcBctSpare6 = 0x00000000,
+ .EmcBctSpare7 = 0x00000000,
+ .EmcBctSpare8 = 0x00000000,
+ .EmcBctSpare9 = 0x00000000,
+ .EmcBctSpare10 = 0x00000000,
+ .EmcBctSpare11 = 0x00000000,
+ .EmcClockSource = 0x80000000,
+ .EmcAutoCalInterval = 0x001fffff,
+ .EmcAutoCalConfig = 0xa1430000,
+ .EmcAutoCalConfig2 = 0x00000000,
+ .EmcAutoCalConfig3 = 0x00000000,
+ .EmcAutoCalWait = 0x00000190,
+ .EmcAdrCfg = 0x00000000,
+ .EmcPinProgramWait = 0x00000001,
+ .EmcPinExtraWait = 0x00000000,
+ .EmcTimingControlWait = 0x00000000,
+ .EmcRc = 0x00000025,
+ .EmcRfc = 0x000000cc,
+ .EmcRfcSlr = 0x00000000,
+ .EmcRas = 0x0000001a,
+ .EmcRp = 0x00000009,
+ .EmcR2r = 0x00000000,
+ .EmcW2w = 0x00000000,
+ .EmcR2w = 0x00000008,
+ .EmcW2r = 0x0000000d,
+ .EmcR2p = 0x00000004,
+ .EmcW2p = 0x00000013,
+ .EmcRdRcd = 0x00000009,
+ .EmcWrRcd = 0x00000009,
+ .EmcRrd = 0x00000004,
+ .EmcRext = 0x00000002,
+ .EmcWext = 0x00000000,
+ .EmcWdv = 0x00000006,
+ .EmcWdvMask = 0x00000006,
+ .EmcQUse = 0x0000000b,
+ .EmcQuseWidth = 0x00000002,
+ .EmcIbdly = 0x00000000,
+ .EmcEInput = 0x00000002,
+ .EmcEInputDuration = 0x0000000d,
+ .EmcPutermExtra = 0x00080000,
+ .EmcPutermWidth = 0x00000004,
+ .EmcPutermAdj = 0x00000000,
+ .EmcCdbCntl1 = 0x00000000,
+ .EmcCdbCntl2 = 0x00000000,
+ .EmcCdbCntl3 = 0x00000000,
+ .EmcQRst = 0x00000001,
+ .EmcQSafe = 0x00000014,
+ .EmcRdv = 0x00000018,
+ .EmcRdvMask = 0x0000001a,
+ .EmcQpop = 0x0000000f,
+ .EmcCtt = 0x00000000,
+ .EmcCttDuration = 0x00000004,
+ .EmcRefresh = 0x000017e2,
+ .EmcBurstRefreshNum = 0x00000000,
+ .EmcPreRefreshReqCnt = 0x000005f8,
+ .EmcPdEx2Wr = 0x00000003,
+ .EmcPdEx2Rd = 0x00000011,
+ .EmcPChg2Pden = 0x00000001,
+ .EmcAct2Pden = 0x00000000,
+ .EmcAr2Pden = 0x000000c6,
+ .EmcRw2Pden = 0x00000018,
+ .EmcTxsr = 0x000000d6,
+ .EmcTxsrDll = 0x00000200,
+ .EmcTcke = 0x00000005,
+ .EmcTckesr = 0x00000006,
+ .EmcTpd = 0x00000005,
+ .EmcTfaw = 0x0000001d,
+ .EmcTrpab = 0x00000000,
+ .EmcTClkStable = 0x00000008,
+ .EmcTClkStop = 0x00000008,
+ .EmcTRefBw = 0x00001822,
+ .EmcFbioCfg5 = 0x104ab098,
+ .EmcFbioCfg6 = 0x00000000,
+ .EmcFbioSpare = 0x00000000,
+ .EmcCfgRsv = 0xff00ff00,
+ .EmcMrs = 0x80000d71,
+ .EmcEmrs = 0x80100002,
+ .EmcEmrs2 = 0x80200018,
+ .EmcEmrs3 = 0x80300000,
+ .EmcMrw1 = 0x00000000,
+ .EmcMrw2 = 0x00000000,
+ .EmcMrw3 = 0x00000000,
+ .EmcMrw4 = 0x00000000,
+ .EmcMrwExtra = 0x00000000,
+ .EmcWarmBootMrwExtra = 0x00000000,
+ .EmcWarmBootExtraModeRegWriteEnable = 0x00000000,
+ .EmcExtraModeRegWriteEnable = 0x00000000,
+ .EmcMrwResetCommand = 0x00000000,
+ .EmcMrwResetNInitWait = 0x00000000,
+ .EmcMrsWaitCnt = 0x00f8000c,
+ .EmcMrsWaitCnt2 = 0x00f8000c,
+ .EmcCfg = 0x73300000,
+ .EmcCfg2 = 0x0000089d,
+ .EmcCfgPipe = 0x00004080,
+ .EmcDbg = 0x01000c00,
+ .EmcCmdQ = 0x10004408,
+ .EmcMc2EmcQ = 0x06000404,
+ .EmcDynSelfRefControl = 0x80003012,
+ .AhbArbitrationXbarCtrlMemInitDone = 0x00000001,
+ .EmcCfgDigDll = 0xe00700b1,
+ .EmcCfgDigDllPeriod = 0x00008000,
+ .EmcDevSelect = 0x00000002,
+ .EmcSelDpdCtrl = 0x00040000,
+ .EmcDllXformDqs0 = 0x007fc008,
+ .EmcDllXformDqs1 = 0x007fc008,
+ .EmcDllXformDqs2 = 0x007fc008,
+ .EmcDllXformDqs3 = 0x007fc008,
+ .EmcDllXformDqs4 = 0x007fc008,
+ .EmcDllXformDqs5 = 0x007fc008,
+ .EmcDllXformDqs6 = 0x007fc008,
+ .EmcDllXformDqs7 = 0x007fc008,
+ .EmcDllXformDqs8 = 0x007fc008,
+ .EmcDllXformDqs9 = 0x007fc008,
+ .EmcDllXformDqs10 = 0x007fc008,
+ .EmcDllXformDqs11 = 0x007fc008,
+ .EmcDllXformDqs12 = 0x007fc008,
+ .EmcDllXformDqs13 = 0x007fc008,
+ .EmcDllXformDqs14 = 0x007fc008,
+ .EmcDllXformDqs15 = 0x007fc008,
+ .EmcDllXformQUse0 = 0x00000000,
+ .EmcDllXformQUse1 = 0x00000000,
+ .EmcDllXformQUse2 = 0x00000000,
+ .EmcDllXformQUse3 = 0x00000000,
+ .EmcDllXformQUse4 = 0x00000000,
+ .EmcDllXformQUse5 = 0x00000000,
+ .EmcDllXformQUse6 = 0x00000000,
+ .EmcDllXformQUse7 = 0x00000000,
+ .EmcDllXformAddr0 = 0x0002c000,
+ .EmcDllXformAddr1 = 0x0002c000,
+ .EmcDllXformAddr2 = 0x00000000,
+ .EmcDllXformAddr3 = 0x0002c000,
+ .EmcDllXformAddr4 = 0x0002c000,
+ .EmcDllXformAddr5 = 0x00000000,
+ .EmcDllXformQUse8 = 0x00000000,
+ .EmcDllXformQUse9 = 0x00000000,
+ .EmcDllXformQUse10 = 0x00000000,
+ .EmcDllXformQUse11 = 0x00000000,
+ .EmcDllXformQUse12 = 0x00000000,
+ .EmcDllXformQUse13 = 0x00000000,
+ .EmcDllXformQUse14 = 0x00000000,
+ .EmcDllXformQUse15 = 0x00000000,
+ .EmcDliTrimTxDqs0 = 0x00000008,
+ .EmcDliTrimTxDqs1 = 0x00000008,
+ .EmcDliTrimTxDqs2 = 0x00000005,
+ .EmcDliTrimTxDqs3 = 0x00000008,
+ .EmcDliTrimTxDqs4 = 0x0000000a,
+ .EmcDliTrimTxDqs5 = 0x00000008,
+ .EmcDliTrimTxDqs6 = 0x0000000a,
+ .EmcDliTrimTxDqs7 = 0x0000000a,
+ .EmcDliTrimTxDqs8 = 0x00000008,
+ .EmcDliTrimTxDqs9 = 0x00000008,
+ .EmcDliTrimTxDqs10 = 0x00000005,
+ .EmcDliTrimTxDqs11 = 0x00000008,
+ .EmcDliTrimTxDqs12 = 0x0000000a,
+ .EmcDliTrimTxDqs13 = 0x00000008,
+ .EmcDliTrimTxDqs14 = 0x0000000a,
+ .EmcDliTrimTxDqs15 = 0x0000000a,
+ .EmcDllXformDq0 = 0x0000000c,
+ .EmcDllXformDq1 = 0x0000000c,
+ .EmcDllXformDq2 = 0x0000000c,
+ .EmcDllXformDq3 = 0x0000000c,
+ .EmcDllXformDq4 = 0x0000000c,
+ .EmcDllXformDq5 = 0x0000000c,
+ .EmcDllXformDq6 = 0x0000000c,
+ .EmcDllXformDq7 = 0x0000000c,
+ .WarmBootWait = 0x00000002,
+ .EmcCttTermCtrl = 0x00000802,
+ .EmcOdtWrite = 0x00000000,
+ .EmcOdtRead = 0x00000000,
+ .EmcZcalInterval = 0x00020000,
+ .EmcZcalWaitCnt = 0x00000042,
+ .EmcZcalMrwCmd = 0x80000000,
+ .EmcMrsResetDll = 0x00000000,
+ .EmcZcalInitDev0 = 0x80000011,
+ .EmcZcalInitDev1 = 0x00000000,
+ .EmcZcalInitWait = 0x00000001,
+ .EmcZcalWarmColdBootEnables = 0x00000003,
+ .EmcMrwLpddr2ZcalWarmBoot = 0x040a00ab,
+ .EmcZqCalDdr3WarmBoot = 0x00000000,
+ .EmcZcalWarmBootWait = 0x00000001,
+ .EmcMrsWarmBootEnable = 0x00000001,
+ .EmcMrsResetDllWait = 0x00000000,
+ .EmcMrsExtra = 0x80000d71,
+ .EmcWarmBootMrsExtra = 0x80100002,
+ .EmcEmrsDdr2DllEnable = 0x00000000,
+ .EmcMrsDdr2DllReset = 0x00000000,
+ .EmcEmrsDdr2OcdCalib = 0x00000000,
+ .EmcDdr2Wait = 0x00000000,
+ .EmcClkenOverride = 0x00000000,
+ .McDisExtraSnapLevels = 0x00000000,
+ .EmcExtraRefreshNum = 0x00000002,
+ .EmcClkenOverrideAllWarmBoot = 0x00000000,
+ .McClkenOverrideAllWarmBoot = 0x00000000,
+ .EmcCfgDigDllPeriodWarmBoot = 0x00000003,
+ .PmcVddpSel = 0x00000002,
+ .PmcVddpSelWait = 0x00000002,
+ .PmcDdrPwr = 0x00000003,
+ .PmcDdrCfg = 0x00002002,
+ .PmcIoDpd3Req = 0x4fff2f97,
+ .PmcIoDpd3ReqWait = 0x00000000,
+ .PmcRegShort = 0x00000000,
+ .PmcNoIoPower = 0x00000000,
+ .PmcPorDpdCtrlWait = 0x00000000,
+ .EmcXm2CmdPadCtrl = 0x100002a0,
+ .EmcXm2CmdPadCtrl2 = 0x770c0000,
+ .EmcXm2CmdPadCtrl3 = 0x050c0000,
+ .EmcXm2CmdPadCtrl4 = 0x00000000,
+ .EmcXm2CmdPadCtrl5 = 0x00111111,
+ .EmcXm2DqsPadCtrl = 0x770c1414,
+ .EmcXm2DqsPadCtrl2 = 0x0120113d,
+ .EmcXm2DqsPadCtrl3 = 0x51451420,
+ .EmcXm2DqsPadCtrl4 = 0x00514514,
+ .EmcXm2DqsPadCtrl5 = 0x00514514,
+ .EmcXm2DqsPadCtrl6 = 0x51451400,
+ .EmcXm2DqPadCtrl = 0x770c2990,
+ .EmcXm2DqPadCtrl2 = 0x00000000,
+ .EmcXm2DqPadCtrl3 = 0x00000000,
+ .EmcXm2ClkPadCtrl = 0x77ffc085,
+ .EmcXm2ClkPadCtrl2 = 0x00000202,
+ .EmcXm2CompPadCtrl = 0x81f1f108,
+ .EmcXm2VttGenPadCtrl = 0x07070004,
+ .EmcXm2VttGenPadCtrl2 = 0x00000000,
+ .EmcXm2VttGenPadCtrl3 = 0x016eeeee,
+ .EmcAcpdControl = 0x00000000,
+ .EmcSwizzleRank0ByteCfg = 0x00003120,
+ .EmcSwizzleRank0Byte0 = 0x01643752,
+ .EmcSwizzleRank0Byte1 = 0x34675021,
+ .EmcSwizzleRank0Byte2 = 0x63170254,
+ .EmcSwizzleRank0Byte3 = 0x14065327,
+ .EmcSwizzleRank1ByteCfg = 0x00003120,
+ .EmcSwizzleRank1Byte0 = 0x73541062,
+ .EmcSwizzleRank1Byte1 = 0x10637254,
+ .EmcSwizzleRank1Byte2 = 0x62043715,
+ .EmcSwizzleRank1Byte3 = 0x73015624,
+ .EmcDsrVttgenDrv = 0x0606003f,
+ .EmcTxdsrvttgen = 0x00000000,
+ .EmcBgbiasCtl0 = 0x00000000,
+ .McEmemAdrCfg = 0x00000000,
+ .McEmemAdrCfgDev0 = 0x00080303,
+ .McEmemAdrCfgDev1 = 0x00080303,
+ .McEmemAdrCfgBankMask0 = 0x00001248,
+ .McEmemAdrCfgBankMask1 = 0x00002490,
+ .McEmemAdrCfgBankMask2 = 0x00000920,
+ .McEmemAdrCfgBankSwizzle3 = 0x00000001,
+ .McEmemCfg = 0x00000800,
+ .McEmemArbCfg = 0x0e00000b,
+ .McEmemArbOutstandingReq = 0x80000040,
+ .McEmemArbTimingRcd = 0x00000004,
+ .McEmemArbTimingRp = 0x00000005,
+ .McEmemArbTimingRc = 0x00000013,
+ .McEmemArbTimingRas = 0x0000000c,
+ .McEmemArbTimingFaw = 0x0000000f,
+ .McEmemArbTimingRrd = 0x00000002,
+ .McEmemArbTimingRap2Pre = 0x00000003,
+ .McEmemArbTimingWap2Pre = 0x0000000c,
+ .McEmemArbTimingR2R = 0x00000002,
+ .McEmemArbTimingW2W = 0x00000002,
+ .McEmemArbTimingR2W = 0x00000006,
+ .McEmemArbTimingW2R = 0x00000008,
+ .McEmemArbDaTurns = 0x08060202,
+ .McEmemArbDaCovers = 0x00160d13,
+ .McEmemArbMisc0 = 0x734c2414,
+ .McEmemArbMisc1 = 0x70000f02,
+ .McEmemArbRing1Throttle = 0x001f0000,
+ .McEmemArbOverride = 0x10000000,
+ .McEmemArbOverride1 = 0x00000000,
+ .McEmemArbRsv = 0xff00ff00,
+ .McClkenOverride = 0x00000000,
+ .McStatControl = 0x00000000,
+ .McDisplaySnapRing = 0x00000003,
+ .McVideoProtectBom = 0xfff00000,
+ .McVideoProtectBomAdrHi = 0x00000000,
+ .McVideoProtectSizeMb = 0x00000000,
+ .McVideoProtectVprOverride = 0xe4bac743,
+ .McVideoProtectVprOverride1 = 0x00000013,
+ .McVideoProtectGpuOverride0 = 0x00000000,
+ .McVideoProtectGpuOverride1 = 0x00000000,
+ .McSecCarveoutBom = 0xfff00000,
+ .McSecCarveoutAdrHi = 0x00000000,
+ .McSecCarveoutSizeMb = 0x00000000,
+ .McVideoProtectWriteAccess = 0x00000000,
+ .McSecCarveoutProtectWriteAccess = 0x00000000,
+ .EmcCaTrainingEnable = 0x00000000,
+ .EmcCaTrainingTimingCntl1 = 0x1f7df7df,
+ .EmcCaTrainingTimingCntl2 = 0x0000001f,
+ .SwizzleRankByteEncode = 0x0000000b,
+ .BootRomPatchControl = 0x00000000,
+ .BootRomPatchData = 0x00000000,
+ .McMtsCarveoutBom = 0xfff00000,
+ .McMtsCarveoutAdrHi = 0x00000000,
+ .McMtsCarveoutSizeMb = 0x00000000,
+ .McMtsCarveoutRegCtrl = 0x00000000,
+},
diff --git a/src/mainboard/google/nyan_blaze/sdram_configs.c b/src/mainboard/google/nyan_blaze/sdram_configs.c
index 4d098b2482..4b4fed264a 100644
--- a/src/mainboard/google/nyan_blaze/sdram_configs.c
+++ b/src/mainboard/google/nyan_blaze/sdram_configs.c
@@ -28,7 +28,7 @@ static struct sdram_params sdram_configs[] = {
#include "bct/sdram-samsung-2GB-792.inc" /* ram_code = 0010 */
#include "bct/sdram-hynix-2GB-204.inc" /* ram_code = 0011 */
#include "bct/sdram-micron-2GB-792.inc" /* ram_code = 0100 */
-#include "bct/sdram-unused.inc" /* ram_code = 0101 */
+#include "bct/sdram-hynix-C-2GB-792.inc" /* ram_code = 0101 */
#include "bct/sdram-unused.inc" /* ram_code = 0110 */
#include "bct/sdram-unused.inc" /* ram_code = 0111 */
#include "bct/sdram-hynix-4GB-792.inc" /* ram_code = 1000 */
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-30 11:08:30 +0000