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authorYinghai Lu <yinghailu@gmail.com>2005-01-13 21:37:29 +0000
committerYinghai Lu <yinghailu@gmail.com>2005-01-13 21:37:29 +0000
commite1f7c7fe0df557d0ad231a97535a44b8f13e5d3b (patch)
tree3c602855e77da764785030b7f708c612ab82723e
parent4a1222d50cb4c533fa01b83613f58b5c94b880a3 (diff)
downloadcoreboot-e1f7c7fe0df557d0ad231a97535a44b8f13e5d3b.tar.xz
ht opt bug
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1869 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
-rw-r--r--src/northbridge/amd/amdk8/incoherent_ht.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/northbridge/amd/amdk8/incoherent_ht.c b/src/northbridge/amd/amdk8/incoherent_ht.c
index d947ea3d4d..2dc3043932 100644
--- a/src/northbridge/amd/amdk8/incoherent_ht.c
+++ b/src/northbridge/amd/amdk8/incoherent_ht.c
@@ -302,7 +302,7 @@ static int ht_setup_chainx(device_t udev, unsigned upos, unsigned bus)
pci_write_config16(dev, pos + PCI_CAP_FLAGS, flags);
/* Remeber the location of the last device */
- udev = PCI_DEV(0, next_unitid, 0);
+ udev = PCI_DEV(bus, next_unitid, 0);
upos = pos;
uoffs = PCI_HT_SLAVE1_OFFS;