diff options
| author | Peter Stuge <peter@stuge.se> | 2011-10-18 05:10:36 +0200 |
|---|---|---|
| committer | Peter Stuge <peter@stuge.se> | 2011-10-19 16:36:11 +0200 |
| commit | 096161a5e44a9104083794c5950ea3cc2108dfb0 (patch) | |
| tree | afaea7cd4c974342dab76e604bbf43fced1da46a | |
| parent | 939103c622ea9f9be32675643373a0d99aaba2b2 (diff) | |
| download | coreboot-096161a5e44a9104083794c5950ea3cc2108dfb0.tar.xz | |
asrock/e350m1: Enable the superio ACPI device in devicetree.cb
This makes the power_on_after_fail NVRAM option work correctly.
Change-Id: I96f05f82d7f133b343cf8d4ef09db50a3db7a83d
Signed-off-by: Peter Stuge <peter@stuge.se>
Reviewed-on: http://review.coreboot.org/292
Tested-by: build bot (Jenkins)
| -rw-r--r-- | src/mainboard/asrock/e350m1/devicetree.cb | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/asrock/e350m1/devicetree.cb b/src/mainboard/asrock/e350m1/devicetree.cb index ca5cf2bce7..a4bdc65fdc 100644 --- a/src/mainboard/asrock/e350m1/devicetree.cb +++ b/src/mainboard/asrock/e350m1/devicetree.cb @@ -90,7 +90,7 @@ chip northbridge/amd/agesa/family14/root_complex end device pnp 2e.8 off end # GPIO2 device pnp 2e.9 off end # GPIO3 - device pnp 2e.a off end # ACPI + device pnp 2e.a on end # ACPI device pnp 2e.b on # HW Monitor io 0x60 = 0x290 irq 0x70 = 5 |