diff options
| author | Furquan Shaikh <furquan@google.com> | 2016-07-27 14:31:16 -0700 |
|---|---|---|
| committer | Furquan Shaikh <furquan@google.com> | 2016-07-28 00:41:40 +0200 |
| commit | 0faf40182327f9bc640d59d16e2ad6ae583f4155 (patch) | |
| tree | ab0bab653fd4a3c356add6207efecc6f0ffe8378 | |
| parent | baf88d370353771d9b48da0aac5bafd45da26042 (diff) | |
| download | coreboot-0faf40182327f9bc640d59d16e2ad6ae583f4155.tar.xz | |
soc/intel/broadwell: Use init_vbnv_cmos from vboot vbnv
BUG=chrome-os-partner:55639
Change-Id: Ie38cdbec513e2bb66e276399c8b4490cbe34a747
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/15924
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Tested-by: build bot (Jenkins)
| -rw-r--r-- | src/soc/intel/broadwell/lpc.c | 28 |
1 files changed, 4 insertions, 24 deletions
diff --git a/src/soc/intel/broadwell/lpc.c b/src/soc/intel/broadwell/lpc.c index 20fa345676..7ec9b46708 100644 --- a/src/soc/intel/broadwell/lpc.c +++ b/src/soc/intel/broadwell/lpc.c @@ -172,25 +172,6 @@ static void pch_power_options(device_t dev) enable_alt_smi(config->alt_gp_smi_en); } -#if IS_ENABLED(CONFIG_CHROMEOS) && IS_ENABLED(CONFIG_VBOOT_VBNV_CMOS) -/* - * Preserve Vboot NV data when clearing CMOS as it will - * have been re-initialized already by Vboot firmware init. - */ -static void pch_cmos_init_preserve(int reset) -{ - uint8_t vbnv[VBOOT_VBNV_BLOCK_SIZE]; - - if (reset) - read_vbnv(vbnv); - - cmos_init(reset); - - if (reset) - save_vbnv(vbnv); -} -#endif - static void pch_rtc_init(struct device *dev) { u8 reg8; @@ -204,11 +185,10 @@ static void pch_rtc_init(struct device *dev) printk(BIOS_DEBUG, "rtc_failed = 0x%x\n", rtc_failed); } -#if IS_ENABLED(CONFIG_CHROMEOS) && IS_ENABLED(CONFIG_VBOOT_VBNV_CMOS) - pch_cmos_init_preserve(rtc_failed); -#else - cmos_init(rtc_failed); -#endif + if (IS_ENABLED(CONFIG_VBOOT_VBNV_CMOS)) + init_vbnv_cmos(rtc_failed); + else + cmos_init(rtc_failed); } static const struct reg_script pch_misc_init_script[] = { |