diff options
author | Julius Werner <jwerner@chromium.org> | 2017-03-27 19:26:32 -0700 |
---|---|---|
committer | Julius Werner <jwerner@chromium.org> | 2017-03-28 22:12:54 +0200 |
commit | 1210b41283f70ea2a8b562da940f853442f292ab (patch) | |
tree | daffbb299094eff50bc229bedad65ee36d8b6f7e | |
parent | 84b2978ed664414e2a7b34674f6f448756081f6f (diff) | |
download | coreboot-1210b41283f70ea2a8b562da940f853442f292ab.tar.xz |
vboot: Select SoC-specific configuration for all Chrome OS boards
Some Chrome OS boards previously didn't have a hardcoded vboot
configuration (e.g. STARTS_IN_BOOTBLOCK/_ROMSTAGE, SEPARATE_VERSTAGE,
etc.) selected from their SoC and mainboard Kconfig files, and instead
relied on the Chrome OS build system to pass in those options
separately. Since there is usually only one "best" vboot configuration
for a certain board and there is often board or SoC code specifically
written with that configuration in mind (e.g. memlayout), these options
should not be adjustable in menuconfig and instead always get selected
by board and SoC Makefiles (as opposed to some external build system).
(Removing MAINBOARD_HAS_CHROMEOS from Urara because vboot support for
Pistachio/MIPS was never finished. Trying to enable even post-romstage
vboot leads to weird compiler errors that I don't want to track down
now. Let's stop pretending this board has working Chrome OS support
because it never did.)
Change-Id: Ibddf413568630f2e5d6e286b9eca6378d7170104
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/19022
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
-rw-r--r-- | src/mainboard/google/urara/Kconfig | 1 | ||||
-rw-r--r-- | src/northbridge/intel/haswell/Kconfig | 3 | ||||
-rw-r--r-- | src/northbridge/intel/sandybridge/Kconfig | 3 | ||||
-rw-r--r-- | src/soc/broadcom/cygnus/Kconfig | 1 | ||||
-rw-r--r-- | src/soc/intel/baytrail/Kconfig | 3 | ||||
-rw-r--r-- | src/soc/intel/braswell/Kconfig | 3 | ||||
-rw-r--r-- | src/soc/intel/broadwell/Kconfig | 3 | ||||
-rw-r--r-- | src/soc/nvidia/tegra210/Kconfig | 2 | ||||
-rw-r--r-- | src/soc/qualcomm/ipq40xx/Kconfig | 1 | ||||
-rw-r--r-- | src/soc/qualcomm/ipq806x/Kconfig | 1 | ||||
-rw-r--r-- | src/soc/samsung/exynos5250/Kconfig | 7 | ||||
-rw-r--r-- | src/soc/samsung/exynos5420/Kconfig | 7 |
12 files changed, 34 insertions, 1 deletions
diff --git a/src/mainboard/google/urara/Kconfig b/src/mainboard/google/urara/Kconfig index e7b9e0e3b7..06263d51fb 100644 --- a/src/mainboard/google/urara/Kconfig +++ b/src/mainboard/google/urara/Kconfig @@ -20,7 +20,6 @@ config BOARD_SPECIFIC_OPTIONS def_bool y select BOARD_ROMSIZE_KB_512 select BOOTBLOCK_CONSOLE - select MAINBOARD_HAS_CHROMEOS select SPI_FLASH_WINBOND select CPU_IMGTEC_PISTACHIO select COMMON_CBFS_SPI_WRAPPER diff --git a/src/northbridge/intel/haswell/Kconfig b/src/northbridge/intel/haswell/Kconfig index e9a93bacae..48a92b6d74 100644 --- a/src/northbridge/intel/haswell/Kconfig +++ b/src/northbridge/intel/haswell/Kconfig @@ -25,6 +25,9 @@ config NORTHBRIDGE_INTEL_HASWELL if NORTHBRIDGE_INTEL_HASWELL +config VBOOT + select VBOOT_STARTS_IN_ROMSTAGE + config BOOTBLOCK_NORTHBRIDGE_INIT string default "northbridge/intel/haswell/bootblock.c" diff --git a/src/northbridge/intel/sandybridge/Kconfig b/src/northbridge/intel/sandybridge/Kconfig index c78b397ecc..8b92077a4f 100644 --- a/src/northbridge/intel/sandybridge/Kconfig +++ b/src/northbridge/intel/sandybridge/Kconfig @@ -32,6 +32,9 @@ config NORTHBRIDGE_INTEL_IVYBRIDGE if NORTHBRIDGE_INTEL_IVYBRIDGE || NORTHBRIDGE_INTEL_SANDYBRIDGE +config VBOOT + select VBOOT_STARTS_IN_ROMSTAGE + config USE_NATIVE_RAMINIT bool "Use native raminit" default y diff --git a/src/soc/broadcom/cygnus/Kconfig b/src/soc/broadcom/cygnus/Kconfig index 46109030ce..e5849f020a 100644 --- a/src/soc/broadcom/cygnus/Kconfig +++ b/src/soc/broadcom/cygnus/Kconfig @@ -29,6 +29,7 @@ config SOC_BROADCOM_CYGNUS if SOC_BROADCOM_CYGNUS config CHROMEOS + select VBOOT_STARTS_IN_BOOTBLOCK select SEPARATE_VERSTAGE select RETURN_FROM_VERSTAGE diff --git a/src/soc/intel/baytrail/Kconfig b/src/soc/intel/baytrail/Kconfig index 2d07c99ad9..752e10a452 100644 --- a/src/soc/intel/baytrail/Kconfig +++ b/src/soc/intel/baytrail/Kconfig @@ -39,6 +39,9 @@ config CPU_SPECIFIC_OPTIONS select HAVE_INTEL_FIRMWARE select HAVE_SPI_CONSOLE_SUPPORT +config VBOOT + select VBOOT_STARTS_IN_ROMSTAGE + config BOOTBLOCK_CPU_INIT string default "soc/intel/baytrail/bootblock/bootblock.c" diff --git a/src/soc/intel/braswell/Kconfig b/src/soc/intel/braswell/Kconfig index ac4a2ae213..61f41edd2c 100644 --- a/src/soc/intel/braswell/Kconfig +++ b/src/soc/intel/braswell/Kconfig @@ -46,6 +46,9 @@ config CPU_SPECIFIC_OPTIONS select HAVE_INTEL_FIRMWARE select HAVE_SPI_CONSOLE_SUPPORT +config VBOOT + select VBOOT_STARTS_IN_ROMSTAGE + config BOOTBLOCK_CPU_INIT string default "soc/intel/braswell/bootblock/bootblock.c" diff --git a/src/soc/intel/broadwell/Kconfig b/src/soc/intel/broadwell/Kconfig index 0cbd9e4784..34f515f145 100644 --- a/src/soc/intel/broadwell/Kconfig +++ b/src/soc/intel/broadwell/Kconfig @@ -46,6 +46,9 @@ config CPU_SPECIFIC_OPTIONS select HAVE_SPI_CONSOLE_SUPPORT select CPU_INTEL_COMMON +config VBOOT + select VBOOT_STARTS_IN_ROMSTAGE + config BOOTBLOCK_CPU_INIT string default "soc/intel/broadwell/bootblock/cpu.c" diff --git a/src/soc/nvidia/tegra210/Kconfig b/src/soc/nvidia/tegra210/Kconfig index 4e3beccff4..880f1996f0 100644 --- a/src/soc/nvidia/tegra210/Kconfig +++ b/src/soc/nvidia/tegra210/Kconfig @@ -18,6 +18,8 @@ config SOC_NVIDIA_TEGRA210 if SOC_NVIDIA_TEGRA210 config CHROMEOS + select VBOOT_STARTS_IN_BOOTBLOCK + select SEPARATE_VERSTAGE select VBOOT_OPROM_MATTERS config MAINBOARD_DO_DSI_INIT diff --git a/src/soc/qualcomm/ipq40xx/Kconfig b/src/soc/qualcomm/ipq40xx/Kconfig index 05f29e4be9..d0c1fbd4f0 100644 --- a/src/soc/qualcomm/ipq40xx/Kconfig +++ b/src/soc/qualcomm/ipq40xx/Kconfig @@ -13,6 +13,7 @@ config SOC_QC_IPQ40XX if SOC_QC_IPQ40XX config CHROMEOS + select VBOOT_STARTS_IN_BOOTBLOCK select RETURN_FROM_VERSTAGE select SEPARATE_VERSTAGE select VBOOT_VBNV_FLASH diff --git a/src/soc/qualcomm/ipq806x/Kconfig b/src/soc/qualcomm/ipq806x/Kconfig index 32b61bc53a..13977e5cba 100644 --- a/src/soc/qualcomm/ipq806x/Kconfig +++ b/src/soc/qualcomm/ipq806x/Kconfig @@ -12,6 +12,7 @@ config SOC_QC_IPQ806X if SOC_QC_IPQ806X config CHROMEOS + select VBOOT_STARTS_IN_BOOTBLOCK select VBOOT_VBNV_FLASH select SEPARATE_VERSTAGE select RETURN_FROM_VERSTAGE diff --git a/src/soc/samsung/exynos5250/Kconfig b/src/soc/samsung/exynos5250/Kconfig index 63b58e7944..40c8065758 100644 --- a/src/soc/samsung/exynos5250/Kconfig +++ b/src/soc/samsung/exynos5250/Kconfig @@ -10,3 +10,10 @@ config CPU_SAMSUNG_EXYNOS5250 select HAVE_HARD_RESET bool default n + +if CPU_SAMSUNG_EXYNOS5250 + +config VBOOT + select VBOOT_STARTS_IN_ROMSTAGE + +endif diff --git a/src/soc/samsung/exynos5420/Kconfig b/src/soc/samsung/exynos5420/Kconfig index 02c71c0bab..7fb2f8f07c 100644 --- a/src/soc/samsung/exynos5420/Kconfig +++ b/src/soc/samsung/exynos5420/Kconfig @@ -9,3 +9,10 @@ config CPU_SAMSUNG_EXYNOS5420 select RELOCATABLE_MODULES bool default n + +if CPU_SAMSUNG_EXYNOS5420 + +config VBOOT + select VBOOT_STARTS_IN_ROMSTAGE + +endif |