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authorStefan Reinauer <stepan@openbios.org>2003-11-27 11:25:01 +0000
committerStefan Reinauer <stepan@openbios.org>2003-11-27 11:25:01 +0000
commit13f8c07850ef34af891f0cffe287a0209b57f259 (patch)
treef77b6f9f2fed3635138600f343eb6d4ee1a0fcdb
parent221cb417ff63ea5f84a994d135b5c276c5be9b51 (diff)
downloadcoreboot-13f8c07850ef34af891f0cffe287a0209b57f259.tar.xz
update
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1301 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
-rw-r--r--src/mainboard/amd/solo/irq_tables.c40
1 files changed, 20 insertions, 20 deletions
diff --git a/src/mainboard/amd/solo/irq_tables.c b/src/mainboard/amd/solo/irq_tables.c
index 286905c26f..feeace1605 100644
--- a/src/mainboard/amd/solo/irq_tables.c
+++ b/src/mainboard/amd/solo/irq_tables.c
@@ -1,31 +1,31 @@
-/* This file was generated by getpir.c, do not modify!
- (but if you do, please run checkpir on it to verify)
- Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up
-
- Documentation at : http://www.microsoft.com/hwdev/busbios/PCIIRQ.HTM
-*/
-
#include <arch/pirq_routing.h>
const struct irq_routing_table intel_irq_routing_table = {
PIRQ_SIGNATURE, /* u32 signature */
PIRQ_VERSION, /* u16 version */
- 32+16*7, /* there can be total 7 devices on the bus */
- 0, /* Where the interrupt router lies (bus) */
+ 32+16*9, /* there can be total 9 devices on the bus */
+ 1, /* Where the interrupt router lies (bus) */
(5<<3)|3, /* Where the interrupt router lies (dev) */
- 0xc20, /* IRQs devoted exclusively to PCI usage */
+ 0x0, /* IRQs devoted exclusively to PCI usage */
0x1022, /* Vendor */
- 0x746b, /* Device */
+ 0x7443, /* Device */
0, /* Crap (miniport) */
{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */
- 0xdf, /* u8 checksum , mod 256 checksum must give zero */
- { /* bus, devfn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu */
- {0x02, (5<<3)|0, {{0x02, 0xdeb8}, {0x03, 0xdeb8}, {0x04, 0xdeb8}, {0x01, 0xdeb8}}, 0x02, 0x00},
- {0x02, (6<<3)|0, {{0x03, 0xdeb8}, {0x04, 0xdeb8}, {0x01, 0xdeb8}, {0x02, 0xdeb8}}, 0x03, 0x00},
- {0x02, (7<<3)|0, {{0x04, 0xdeb8}, {0x01, 0xdeb8}, {0x02, 0xdeb8}, {0x03, 0xdeb8}}, 0x04, 0x00},
- {0x02, (1<<3)|1, {{0x01, 0xdeb8}, {0x01, 0xdeb8}, {0x01, 0xdeb8}, {0x01, 0xdeb8}}, 0x00, 0x00},
- {0x00, (5<<3)|1, {{0x01, 0xdeb8}, {0x02, 0xdeb8}, {0x03, 0xdeb8}, {0x04, 0xdeb8}}, 0x00, 0x00},
- {0x00, (2<<3)|0, {{0x01, 0xdeb8}, {0x02, 0xdeb8}, {0x03, 0xdeb8}, {0x04, 0xdeb8}}, 0x00, 0x00},
- {0xff, 0xff, {{0xff, 0xffff}, {0xff, 0xffff}, {0xff, 0xffff}, {0xff, 0xffff}}, 0xff, 0xff},
+ 0xb0, /* u8 checksum , mod 256 checksum must give zero */
+ { /* bus, devfn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu */
+ /* PCI Slot 1 */
+ {0x02, (0x01<<3)|0, {{0x02, 0xdef8}, {0x03, 0xdef8}, {0x04, 0xdef8}, {0x01, 0xdef8}}, 0x01, 0},
+ /* PCI Slot 2 */
+ {0x02, (0x02<<3)|0, {{0x03, 0xdef8}, {0x04, 0xdef8}, {0x01, 0xdef8}, {0x02, 0xdef8}}, 0x02, 0},
+ /* PCI Slot 3 */
+ {0x01, (0x01<<3)|0, {{0x02, 0xdef8}, {0x03, 0xdef8}, {0x04, 0xdef8}, {0x01, 0xdef8}}, 0x03, 0},
+ /* PCI Slot 4 */
+ {0x01, (0x02<<3)|0, {{0x03, 0xdef8}, {0x04, 0xdef8}, {0x01, 0xdef8}, {0x02, 0xdef8}}, 0x04, 0},
+ /* PCI Slot 5 */
+ {0x03, (0x05<<3)|0, {{0x02, 0xdef8}, {0x03, 0xdef8}, {0x04, 0xdef8}, {0x01, 0xdef8}}, 0x05, 0},
+ /* PCI Slot 6 */
+ {0x03, (0x04<<3)|0, {{0x01, 0xdef8}, {0x02, 0xdef8}, {0x03, 0xdef8}, {0x04, 0xdef8}}, 0x06, 0},
+ /* Let Linux know about bus 1 */
+ {0x01, (0x05<<3)|3, {{0x00, 0xdef8}, {0x00, 0xdef8}, {0x00, 0xdef8}, {0x00, 0xdef8}}, 0x00, 0},
}
};