diff options
author | Daisuke Nojiri <dnojiri@chromium.org> | 2014-03-26 15:04:10 -0700 |
---|---|---|
committer | Marc Jones <marc.jones@se-eng.com> | 2014-11-14 07:27:42 +0100 |
commit | 14ade701bd6efd396d4caf641e974c564f07c838 (patch) | |
tree | 3c6e434a00c267ab4cfe23f0bc9b81f83e45623f | |
parent | 4a12cfe759500e31200ec92677992038f10915ac (diff) | |
download | coreboot-14ade701bd6efd396d4caf641e974c564f07c838.tar.xz |
Nyan: Set I2S1 Source to CLK_M
This is required to send 1.5Mhz clock to Max98090 and get a right beep sound.
BUG=chrome-os-partner:26609
TEST=Booted Nyan. Verified Max98090 can beep. Measured frequency by smartphone.
BRANCH=none
Original-Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Original-Change-Id: Ie3ff6df6759cb23d78dc05069553ddb4eb8e508a
Original-Reviewed-on: https://chromium-review.googlesource.com/191791
Original-Reviewed-by: Hung-Te Lin <hungte@chromium.org>
(cherry picked from commit 2f75a147f26ac334fff174a1f9618a2bbe290fe9)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Change-Id: If8c7871dc8202f98ccf23fb0afad1e7745fbf174
Reviewed-on: http://review.coreboot.org/7457
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins)
Reviewed-by: David Hendricks <dhendrix@chromium.org>
-rw-r--r-- | src/mainboard/google/nyan/mainboard.c | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/src/mainboard/google/nyan/mainboard.c b/src/mainboard/google/nyan/mainboard.c index dbca03ccae..a96236bcfa 100644 --- a/src/mainboard/google/nyan/mainboard.c +++ b/src/mainboard/google/nyan/mainboard.c @@ -53,10 +53,11 @@ static void set_clock_sources(void) clock_configure_irregular_source(extperiph1, CLK_M, 12000, 3); /* - * I2S1 can use either PLLP or PLLA. Using PLLP is sufficient now since - * we only need 4.8MHz. Note the source id of PLLP for I2S is 4. + * We need 1.5MHz. So, we use CLK_M. CLK_DIVIDER macro returns a divisor + * (0xe) a little bit off from the ideal value (0xd) but it's good + * enough for beeps. The source id of CLK_M for I2S is 6. */ - clock_configure_irregular_source(i2s1, PLLP, 4800, 4); + clock_configure_irregular_source(i2s1, CLK_M, 1500, 6); /* Note source id of PLLP for HOST1x is 4. */ clock_configure_irregular_source(host1x, PLLP, 408000, 4); |