diff options
author | David Hendricks <dhendrix@chromium.org> | 2014-03-20 20:31:23 -0700 |
---|---|---|
committer | Marc Jones <marc.jones@se-eng.com> | 2014-12-17 02:12:09 +0100 |
commit | 259e49a2c7fff341a65d5b6f1eb28641f39fbe55 (patch) | |
tree | a25b9b7329762470337bd4a0a509e2e17d349f78 | |
parent | 9acbd6ff994f6cee58287b6b324cd4ab2b470c6f (diff) | |
download | coreboot-259e49a2c7fff341a65d5b6f1eb28641f39fbe55.tar.xz |
elog: Isolate some x86-isms
This attempts to isolate/fix some x86-isms:
- Translate flash offset to memory-mapped address only on x86.
- Guard ACPI-dependent line of code
- Use a Kconfig variable for SPI bus when probing the flash rather
than assuming the bus is always on bus 0.
- Zero-out timestamp on non-x86 until we have a better abstraction.
(note: this is based off of some of Gabe's earlier work)
BUG=none
BRANCH=none
TEST=needs testing
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Original-Change-Id: I887576d8bcabe374d8684aa5588f738b36170ef7
Original-Reviewed-on: https://chromium-review.googlesource.com/191203
Original-Commit-Queue: David Hendricks <dhendrix@chromium.org>
Original-Tested-by: David Hendricks <dhendrix@chromium.org>
Original-Reviewed-by: Gabe Black <gabeblack@chromium.org>
(cherry picked from commit 1fc7a75f8c072098e017104788418aeed0705e93)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Change-Id: Ida4b211cf21ecdde9745d4dbef6a63ffb9fbba8d
Reviewed-on: http://review.coreboot.org/7832
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
-rw-r--r-- | src/drivers/elog/elog.c | 27 |
1 files changed, 25 insertions, 2 deletions
diff --git a/src/drivers/elog/elog.c b/src/drivers/elog/elog.c index 94af16e3c0..7cc7e45aa2 100644 --- a/src/drivers/elog/elog.c +++ b/src/drivers/elog/elog.c @@ -17,10 +17,14 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA, 02110-1301 USA */ +#if CONFIG_HAVE_ACPI_RESUME == 1 #include <arch/acpi.h> +#endif #include <cbmem.h> #include <console/console.h> +#if CONFIG_ARCH_X86 #include <pc80/mc146818rtc.h> +#endif #include <smbios.h> #include <spi-generic.h> #include <spi_flash.h> @@ -29,12 +33,12 @@ #include <elog.h> #include "elog_internal.h" +#if CONFIG_CHROMEOS #include <vendorcode/google/chromeos/fmap.h> #if CONFIG_ELOG_FLASH_BASE == 0 #error "CONFIG_ELOG_FLASH_BASE is invalid" #endif - #if CONFIG_ELOG_FULL_THRESHOLD >= CONFIG_ELOG_AREA_SIZE #error "CONFIG_ELOG_FULL_THRESHOLD is larger than CONFIG_ELOG_AREA_SIZE" #endif @@ -92,6 +96,8 @@ static inline u32 get_rom_size(void) */ static inline u32 elog_flash_address_to_offset(u8 *address) { +#if CONFIG_ARCH_X86 + /* For x86, assume address is memory-mapped near 4GB */ u32 rom_size; if (!elog_spi) @@ -100,6 +106,9 @@ static inline u32 elog_flash_address_to_offset(u8 *address) rom_size = get_rom_size(); return (u32)address - ((u32)~0UL - rom_size + 1); +#else + return (u32)address; +#endif } /* @@ -607,13 +616,19 @@ int elog_init(void) #if !defined(__SMM__) /* Log boot count event except in S3 resume */ - if (CONFIG_ELOG_BOOT_COUNT && !acpi_is_wakeup_s3()) +#if CONFIG_ELOG_BOOT_COUNT == 1 +#if CONFIG_HAVE_ACPI_RESUME == 1 + if (!acpi_is_wakeup_s3()) +#endif elog_add_event_dword(ELOG_TYPE_BOOT, boot_count_read()); +#endif +#if CONFIG_ARCH_X86 /* Check and log POST codes from previous boot */ if (CONFIG_CMOS_POST) cmos_post_log(); #endif +#endif return 0; } @@ -623,12 +638,20 @@ int elog_init(void) */ static void elog_fill_timestamp(struct event_header *event) { +#if CONFIG_ARCH_X86 event->second = cmos_read(RTC_CLK_SECOND); event->minute = cmos_read(RTC_CLK_MINUTE); event->hour = cmos_read(RTC_CLK_HOUR); event->day = cmos_read(RTC_CLK_DAYOFMONTH); event->month = cmos_read(RTC_CLK_MONTH); event->year = cmos_read(RTC_CLK_YEAR); +#else + /* + * FIXME: We need to abstract the CMOS stuff on non-x86 platforms. + * Until then, use bogus data here to force the values to 0. + */ + event->month = 0xff; +#endif /* Basic sanity check of expected ranges */ if (event->month > 0x12 || event->day > 0x31 || event->hour > 0x23 || |