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| author | Arthur Heymans <arthur@aheymans.xyz> | 2017-07-12 19:17:56 +0200 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-07-15 21:54:23 +0000 |
| commit | 330c46b963f1d688131d136bf74e0e38f2fe922e (patch) | |
| tree | d64d74960542505f5185fe9d51e452810be32030 | |
| parent | e16f1d7810c6b5920f4c691e6b02d0ead3168ccb (diff) | |
| download | coreboot-330c46b963f1d688131d136bf74e0e38f2fe922e.tar.xz | |
device/pciexp_device.c: Terminate CLK PM message with newline
Change-Id: I746e2cc47a83cb04fd404851d3644b8341761022
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/20544
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
| -rw-r--r-- | src/device/pciexp_device.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/device/pciexp_device.c b/src/device/pciexp_device.c index b7ade0ad76..40c3f8c5ee 100644 --- a/src/device/pciexp_device.c +++ b/src/device/pciexp_device.c @@ -132,7 +132,7 @@ static void pciexp_enable_clock_power_pm(device_t endp, unsigned endp_cap) u16 lnkctl; endp_ca = pci_read_config32(endp, endp_cap + PCI_EXP_LNKCAP); if ((endp_ca & PCI_EXP_CLK_PM) == 0) { - printk(BIOS_INFO, "PCIE CLK PM is not supported by endpoint"); + printk(BIOS_INFO, "PCIE CLK PM is not supported by endpoint\n"); return; } lnkctl = pci_read_config16(endp, endp_cap + PCI_EXP_LNKCTL); |