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author | Chris Zhou <chris_zhou@compal.corp-partner.google.com> | 2018-12-12 20:21:38 +0800 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2018-12-19 05:24:31 +0000 |
commit | 40a69f39359ec01e9a9b25dc33504c7b92948800 (patch) | |
tree | 67631b47b6e8b11b9ebcd8d904ab6e6e17dbd17a | |
parent | 7182b477eb7d717b2838d4750a9c7f78b6043d7c (diff) | |
download | coreboot-40a69f39359ec01e9a9b25dc33504c7b92948800.tar.xz |
mb/google/sarien: Enable ELAN Touchpad and Disable ALPS Touchpad
Enable ELAN Touchpad and Disable ALPS Touchpad
BUG=b:119628524
BRANCH=master
TEST=ELAN Touchpad can work normally.
Change-Id: I7839459a70768fa95ba4871b1915d2ea86419bbb
Signed-off-by: Chris Zhou <chris_zhou@compal.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/30194
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Lijian Zhao <lijian.zhao@intel.com>
-rw-r--r-- | src/mainboard/google/sarien/variants/sarien/devicetree.cb | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/src/mainboard/google/sarien/variants/sarien/devicetree.cb b/src/mainboard/google/sarien/variants/sarien/devicetree.cb index 49200ad511..771bec2cb9 100644 --- a/src/mainboard/google/sarien/variants/sarien/devicetree.cb +++ b/src/mainboard/google/sarien/variants/sarien/devicetree.cb @@ -219,11 +219,11 @@ chip soc/intel/cannonlake end end # I2C #0 device pci 15.1 on - chip drivers/i2c/hid - register "generic.hid" = ""ACPI0C50"" - register "generic.desc" = ""Touchpad"" - register "generic.irq" = "ACPI_IRQ_EDGE_LOW(GPP_B3_IRQ)" - register "hid_desc_reg_offset" = "0x20" + chip drivers/i2c/generic + register "hid" = ""ELAN0000"" + register "desc" = ""ELAN Touchpad"" + register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_B3_IRQ)" + register "probed" = "1" device i2c 2c on end end end # I2C #1 |