[WIP] superio: Add ECE5048

This Super I/O is found on Dell Latitude laptops.

The EC interface and serial port provided by this Super I/O are still
not working.

Signed-off-by: Iru Cai <mytbk920423@gmail.com>
Change-Id: I29d5a926570f8d35020e538c1e7c5dc090719633

5 files changed, 83 insertions, 0 deletions

diff --git a/src/superio/smsc/Makefile.inc b/src/superio/smsc/Makefile.inc
index 9442a9efde..504ed3db33 100644
--- a/src/superio/smsc/Makefile.inc
+++ b/src/superio/smsc/Makefile.inc
@@ -17,3 +17,4 @@ subdirs-y += smscsuperio
 subdirs-y += sio1036
 subdirs-y += sch4037
 subdirs-y += sch5545
+subdirs-y += ece5048
diff --git a/src/superio/smsc/ece5048/Kconfig b/src/superio/smsc/ece5048/Kconfig
new file mode 100644
index 0000000000..7ee3df6e57
--- /dev/null
+++ b/src/superio/smsc/ece5048/Kconfig
@@ -0,0 +1,4 @@
+## SPDX-License-Identifier: GPL-2.0-only
+
+config SUPERIO_SMSC_ECE5048
+	bool
diff --git a/src/superio/smsc/ece5048/Makefile.inc b/src/superio/smsc/ece5048/Makefile.inc
new file mode 100644
index 0000000000..385cdeac49
--- /dev/null
+++ b/src/superio/smsc/ece5048/Makefile.inc
@@ -0,0 +1,4 @@
+# SPDX-License-Identifier: GPL-2.0-only
+
+bootblock-$(CONFIG_SUPERIO_SMSC_ECE5048) += ece5048_early_init.c
+romstage-$(CONFIG_SUPERIO_SMSC_ECE5048) += ece5048_early_init.c
diff --git a/src/superio/smsc/ece5048/ece5048.h b/src/superio/smsc/ece5048/ece5048.h
new file mode 100644
index 0000000000..cff612221b
--- /dev/null
+++ b/src/superio/smsc/ece5048/ece5048.h
@@ -0,0 +1,12 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#ifndef __SUPERIO_ECE5048_ECE5048_H__
+#define __SUPERIO_ECE5048_ECE5048_H__
+
+#include <device/pnp_type.h>
+#include <stdint.h>
+
+void ece5048_early_init(u16 port);
+void ece5048_enable_serial(pnp_devfn_t dev, u16 iobase);
+
+#endif
diff --git a/src/superio/smsc/ece5048/ece5048_early_init.c b/src/superio/smsc/ece5048/ece5048_early_init.c
new file mode 100644
index 0000000000..8b90d25262
--- /dev/null
+++ b/src/superio/smsc/ece5048/ece5048_early_init.c
@@ -0,0 +1,62 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <arch/io.h>
+#include <device/pnp.h>
+#include <device/pnp_def.h>
+#include <device/pnp_ops.h>
+#include <superio/smsc/ece5048/ece5048.h>
+
+static void pnp_enter_conf_state(pnp_devfn_t dev)
+{
+	unsigned int port = dev >> 8;
+	outb(0x55, port);
+}
+
+static void pnp_exit_conf_state(pnp_devfn_t dev)
+{
+	unsigned int port = dev >> 8;
+	outb(0xaa, port);
+}
+
+// both E6230 and E7240 uses port 0x94e
+void ece5048_early_init(u16 port)
+{
+    pnp_devfn_t dev;
+
+    outb(0x55, port);
+    outb(0x55, port);
+
+    pnp_write_config(port << 8, 0x22, 0x10);
+    pnp_write_config(port << 8, 0x23, 0x10);
+    pnp_write_config(port << 8, 0x24, 4);
+    pnp_write_config(port << 8, 0x25, 4);
+
+    dev = PNP_DEV(port, 3);
+    pnp_set_logical_device(dev);
+    pnp_set_enable(dev, 0);
+
+    dev = PNP_DEV(port, 12);
+    pnp_set_logical_device(dev);
+    pnp_set_enable(dev, 1);
+    pnp_set_iobase(dev, PNP_IDX_IO0, 0x928); // is it for all laptops?
+
+    outb(0xaa, port);
+}
+
+/* FIXME: XXX this should be used in ramstage/smm? */
+/* TODO: use 4e/4f in ACPI? */
+void ece5048_enable_serial(pnp_devfn_t dev, u16 iobase)
+{
+	pnp_enter_conf_state(dev);
+
+	pnp_write_config(dev, 0x22, pnp_read_config(dev, 0x22) | 0x10);
+	pnp_write_config(dev, 0x23, pnp_read_config(dev, 0x23) | 0x10);
+
+	pnp_set_logical_device(dev);
+
+	pnp_set_enable(dev, 1);
+	pnp_set_iobase(dev, PNP_IDX_IO0, iobase);
+	pnp_set_irq(dev, PNP_IDX_IRQ0, 4);
+
+	pnp_exit_conf_state(dev);
+}