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author | Xiang Wang <merle@hardenedlinux.org> | 2019-08-27 15:28:26 +0800 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2019-10-16 14:12:20 +0000 |
commit | 4a8fba9ea5a07f9a0857d299eb5b52d7f88b8784 (patch) | |
tree | ab069bb487ee8386b203ef58fcc6a4067375121e | |
parent | ee0b7ad683fabafef228c624348057d31fe1e6d2 (diff) | |
download | coreboot-4a8fba9ea5a07f9a0857d299eb5b52d7f88b8784.tar.xz |
soc/sifive/fu540: test and fix code of fu540 spi
I tested the SPI through the SD card and fixed sd card communication problem.
Added two functions (claim_bus and release_bus). Setting CS signal is invalid by
default.
Change-Id: I60033a148c21bbd5b4946580f6cab0b439d346c6
Signed-off-by: Xiang Wang <merle@hardenedlinux.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35117
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
-rw-r--r-- | src/soc/sifive/fu540/spi.c | 29 |
1 files changed, 27 insertions, 2 deletions
diff --git a/src/soc/sifive/fu540/spi.c b/src/soc/sifive/fu540/spi.c index 6bf1700767..5e30e77939 100644 --- a/src/soc/sifive/fu540/spi.c +++ b/src/soc/sifive/fu540/spi.c @@ -61,6 +61,25 @@ static uint8_t spi_rx(volatile struct spi_ctrl *spictrl) return (uint8_t) out; } +static int spi_claim_bus_(const struct spi_slave *slave) +{ + struct spi_ctrl *spictrl = spictrls[slave->bus]; + spi_reg_csmode csmode; + csmode.raw_bits = 0; + csmode.mode = FU540_SPI_CSMODE_HOLD; + write32(&spictrl->csmode.raw_bits, csmode.raw_bits); + return 0; +} + +static void spi_release_bus_(const struct spi_slave *slave) +{ + struct spi_ctrl *spictrl = spictrls[slave->bus]; + spi_reg_csmode csmode; + csmode.raw_bits = 0; + csmode.mode = FU540_SPI_CSMODE_OFF; + write32(&spictrl->csmode.raw_bits, csmode.raw_bits); +} + static int spi_xfer_(const struct spi_slave *slave, const void *dout, size_t bytesout, void *din, size_t bytesin) @@ -126,6 +145,8 @@ static int spi_setup_(const struct spi_slave *slave) sckmode.pol = FU540_SPI_POL_LEADING; write32(&spictrl->sckmode.raw_bits, sckmode.raw_bits); + write32(&spictrl->csdef, 0xffffffff); + csmode.raw_bits = 0; csmode.mode = FU540_SPI_CSMODE_AUTO; write32(&spictrl->csmode.raw_bits, csmode.raw_bits); @@ -133,7 +154,7 @@ static int spi_setup_(const struct spi_slave *slave) fmt.raw_bits = 0; fmt.proto = FU540_SPI_PROTO_S; fmt.endian = FU540_SPI_ENDIAN_BIG; - fmt.dir = 1; + fmt.dir = 0; fmt.len = 8; write32(&spictrl->fmt.raw_bits, fmt.raw_bits); @@ -143,6 +164,8 @@ static int spi_setup_(const struct spi_slave *slave) struct spi_ctrlr fu540_spi_ctrlr = { .xfer = spi_xfer_, .setup = spi_setup_, + .claim_bus = spi_claim_bus_, + .release_bus = spi_release_bus_, }; const struct spi_ctrlr_buses spi_ctrlr_bus_map[] = { @@ -187,6 +210,8 @@ int fu540_spi_setup(unsigned int bus, unsigned int cs, sckmode.pol = config->pol; write32(&spictrl->sckmode.raw_bits, sckmode.raw_bits); + write32(&spictrl->csdef, 0xffffffff); + csmode.raw_bits = 0; csmode.mode = FU540_SPI_CSMODE_AUTO; write32(&spictrl->csmode.raw_bits, csmode.raw_bits); @@ -194,7 +219,7 @@ int fu540_spi_setup(unsigned int bus, unsigned int cs, fmt.raw_bits = 0; fmt.proto = config->protocol; fmt.endian = config->endianness; - fmt.dir = 1; + fmt.dir = 0; fmt.len = config->bits_per_frame; write32(&spictrl->fmt.raw_bits, fmt.raw_bits); |