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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-07-06 07:57:20 +0300 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-09-24 19:03:57 +0000 |
| commit | 52b1e2814a2c31001df43190574cdc5f0ed4bcbb (patch) | |
| tree | f24df67c77464ee2d1c418a01d0acec2f7b83f9e | |
| parent | fe26be1181510a0532df632506410d9cab57a20d (diff) | |
| download | coreboot-52b1e2814a2c31001df43190574cdc5f0ed4bcbb.tar.xz | |
intel/socket_mPGA604: Enable TSC_CONSTANT_RATE
We can use intel/common implementation for tsc_freq_mhz().
Change-Id: I728732896ad61465fcf0f5b25a6bafd23bca235e
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34199
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
| -rw-r--r-- | src/cpu/intel/model_f2x/Makefile.inc | 2 | ||||
| -rw-r--r-- | src/cpu/intel/socket_mPGA604/Kconfig | 3 |
2 files changed, 5 insertions, 0 deletions
diff --git a/src/cpu/intel/model_f2x/Makefile.inc b/src/cpu/intel/model_f2x/Makefile.inc index 9bb5dca626..5d60d21eda 100644 --- a/src/cpu/intel/model_f2x/Makefile.inc +++ b/src/cpu/intel/model_f2x/Makefile.inc @@ -1,3 +1,5 @@ +subdirs-y += ../common + ramstage-y += model_f2x_init.c cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/0f-02-*) diff --git a/src/cpu/intel/socket_mPGA604/Kconfig b/src/cpu/intel/socket_mPGA604/Kconfig index 1453f9962b..4ec46e0ac8 100644 --- a/src/cpu/intel/socket_mPGA604/Kconfig +++ b/src/cpu/intel/socket_mPGA604/Kconfig @@ -9,9 +9,12 @@ config SOCKET_SPECIFIC_OPTIONS # dummy select MMX select SSE select UDELAY_TSC + select TSC_CONSTANT_RATE select TSC_MONOTONIC_TIMER select SIPI_VECTOR_IN_ROM select C_ENVIRONMENT_BOOTBLOCK + select CPU_INTEL_COMMON + select CPU_INTEL_COMMON_TIMEBASE # mPGA604 are usually Intel Netburst CPUs which should have SSE2 # but the ramtest.c code on the Dell S1850 seems to choke on |