diff options
author | Matt DeVillier <matt.devillier@gmail.com> | 2018-07-31 17:20:00 -0500 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2018-08-02 10:54:46 +0000 |
commit | 57454563436d02962f48d609aa06273ccb9bbe1a (patch) | |
tree | cf0409bab88c3078e1d426b1c46c2c1d47029fca | |
parent | c9f0732cf1babb4009b12ac78c1814535493009c (diff) | |
download | coreboot-57454563436d02962f48d609aa06273ccb9bbe1a.tar.xz |
google/banon: Add support for additional RAM types/configs
Adapted from chromium commits 831a372 and cc96c27
[Banon: board 2nd source DDR memory]
Add support for hynix/H9CCNNN8GTALAR-NUD and Nanya/NT6CL256T32CM-H1
Original-Change-Id: Ifd161ba5ade44e71c88655f760ca66668b5c5178
Original-Change-Id: I5cba13701ed8e037e21d34ed55162ee56291a842
Original-Signed-off-by: T.H. Lin <T.H_Lin@quantatw.com>
Original-Tested-by: TH Lin <t.h_lin@quanta.corp-partner.google.com>
Original-Reviewed-by: Vincent Wang <vwang@chromium.org>
Original-Reviewed-by: YH Lin <yueherngl@chromium.org>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Change-Id: I2166d1025ede33148c7ab623ba59190a342c4736
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/27764
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
-rw-r--r-- | src/mainboard/google/cyan/variants/banon/Makefile.inc | 2 | ||||
-rw-r--r-- | src/mainboard/google/cyan/variants/banon/spd_util.c | 12 |
2 files changed, 12 insertions, 2 deletions
diff --git a/src/mainboard/google/cyan/variants/banon/Makefile.inc b/src/mainboard/google/cyan/variants/banon/Makefile.inc index f6a1f46f8c..a0adcd47f4 100644 --- a/src/mainboard/google/cyan/variants/banon/Makefile.inc +++ b/src/mainboard/google/cyan/variants/banon/Makefile.inc @@ -26,6 +26,8 @@ SPD_SOURCES += samsung_2GiB_dimm_K4E8E324EB-EGCF SPD_SOURCES += empty SPD_SOURCES += hynix_2GiB_dimm_H9CCNNN8GTMLAR-NUD SPD_SOURCES += micron_2GiB_dimm_MT52L256M32D1PF +SPD_SOURCES += hynix_dimm_H9CCNNN8GTALAR-NUD +SPD_SOURCES += nanya_dimm_NT6CL256T32CM-H1 SPD_DEPS := $(foreach f, $(SPD_SOURCES), src/mainboard/$(MAINBOARDDIR)/spd/$(f).spd.hex) diff --git a/src/mainboard/google/cyan/variants/banon/spd_util.c b/src/mainboard/google/cyan/variants/banon/spd_util.c index 2c9181e486..ddae835a38 100644 --- a/src/mainboard/google/cyan/variants/banon/spd_util.c +++ b/src/mainboard/google/cyan/variants/banon/spd_util.c @@ -23,11 +23,14 @@ * 0b0001 - 4GiB total - 2 x 2GiB Samsung K4E8E324EB-EGCF * 0b0011 - 4GiB total - 2 x 2GiB Hynix H9CCNNN8JTBLAR * 0b0100 - 4GiB total - 2 x 2GiB Micron MT52L256M32D1PF - * + * 0b0101 - 4GiB total - 2 x 2GiB Hynix H9CCNNN8GTALAR + * 0b0110 - 4GiB total - 2 x 2GiB NY NT6CL256T32CM-H1 * 0b1000 - 2GiB total - 1 x 2GiB Samsung K4E8E304EE-EGCE * 0b1001 - 2GiB total - 1 x 2GiB Samsung K4E8E324EB-EGCF * 0b1011 - 2GiB total - 1 x 2GiB Hynix H9CCNNN8JTBLAR * 0b1100 - 2GiB total - 1 x 2GiB Micron MT52L256M32D1PF + * 0b1101 - 2GiB total - 1 x 2GiB Hynix H9CCNNN8GTALAR + * 0b1110 - 2GiB total - 1 x 2GiB NY NT6CL256T32CM-H1 */ int get_variant_spd_index(int ram_id, int *dual) @@ -56,7 +59,12 @@ int get_variant_spd_index(int ram_id, int *dual) case 4: printk(BIOS_DEBUG, "Micron MT52L256M32D1PF\n"); break; + case 5: + printk(BIOS_DEBUG, "Hynix H9CCNNN8GTALAR\n"); + break; + case 6: + printk(BIOS_DEBUG, "Nanya NT6CL256T32CM-H1\n"); + break; } - return spd_index; } |