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| author | Duncan Laurie <dlaurie@chromium.org> | 2013-10-13 10:57:50 +0800 |
|---|---|---|
| committer | Isaac Christensen <isaac.christensen@se-eng.com> | 2014-09-08 20:08:00 +0200 |
| commit | 79634759e5961c1c2538b1f96b97bbda277f5db0 (patch) | |
| tree | 6675863513c7d5775d1b52f70056e392730f4ffb | |
| parent | d68932463f0a5c23ebe19cce4465ed5a17dbb5eb (diff) | |
| download | coreboot-79634759e5961c1c2538b1f96b97bbda277f5db0.tar.xz | |
samus: Disable SMBus controller
Nothing is connected to this port.
Change-Id: If3e466a3053fa694a511c2335c16381f77f56f47
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/174089
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
(cherry picked from commit 5ddb6a444d5c3141868eaf618ecb014b0262a796)
Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com>
Reviewed-on: http://review.coreboot.org/6827
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Tested-by: build bot (Jenkins)
| -rw-r--r-- | src/mainboard/google/samus/devicetree.cb | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/google/samus/devicetree.cb b/src/mainboard/google/samus/devicetree.cb index 64d7ebe5b8..f848edc40b 100644 --- a/src/mainboard/google/samus/devicetree.cb +++ b/src/mainboard/google/samus/devicetree.cb @@ -114,7 +114,7 @@ chip northbridge/intel/haswell end end # LPC bridge device pci 1f.2 on end # SATA Controller - device pci 1f.3 on end # SMBus + device pci 1f.3 off end # SMBus device pci 1f.6 on end # Thermal end end |