gm45: enable setting all vram sizes from cmos

Setting the size of the preallocated memory for the igd is done
using a cmos parameter, gfx_uma_size. This was limited to a subset of
all available sizes, that were already implemented elsewhere
in the northbridge code.

What this does is change the cmos parameter to 4 bits instead
of 3 bits to accomodate all vram sizes.
It also adds a sane default of 32mb that already was in place.
The northbridge code that reads this cmos parameter is
also changed for this new cmos settings.

352M is disabled since it causes issues on systems with 4GB or more ram.

TEST: Build, flash target. Clear cmos by corrupting
the checksum (nvramtool -c something).
Set a desired value in gfx_uma_size using nvramtool.
"dmesg | grep stolen" to see what is actually allocated.

Change-Id: Ia6479d03f1abe6d0c94bd7264365505e8f8eaeec
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/14900
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Rudolph <siro@das-labor.org>

6 files changed, 49 insertions, 28 deletions

diff --git a/src/mainboard/lenovo/t400/cmos.default b/src/mainboard/lenovo/t400/cmos.default
index 98ce970278..5cf3e63aea 100644
--- a/src/mainboard/lenovo/t400/cmos.default
+++ b/src/mainboard/lenovo/t400/cmos.default
@@ -13,4 +13,5 @@ sticky_fn=Disable
 power_management_beeps=Enable
 low_battery_beep=Enable
 sata_mode=AHCI
-hybrid_graphics_mode=Integrated Only
\ No newline at end of file
+hybrid_graphics_mode=Integrated Only
+gfx_uma_size=32M
\ No newline at end of file
diff --git a/src/mainboard/lenovo/t400/cmos.layout b/src/mainboard/lenovo/t400/cmos.layout
index b0131f6d0b..b4b77665f0 100644
--- a/src/mainboard/lenovo/t400/cmos.layout
+++ b/src/mainboard/lenovo/t400/cmos.layout
@@ -77,8 +77,8 @@ entries
 940         1       e       1        uwb
 
 # coreboot config options: northbridge
-941         3       e       11       gfx_uma_size
 944         2       e       12       hybrid_graphics_mode
+946         4       e       11       gfx_uma_size
 
 # coreboot config options: EC
 952         8       h       0        volume
@@ -127,12 +127,18 @@ enumerations
 9     1     Primary
 10    0     AHCI
 10    1     Compatible
-11    0     32M
-11    1     48M
-11    2     64M
-11    3     128M
-11    5     96M
-11    6     160M
+11    0     1M
+11    1     4M
+11    2     8M
+11    3     16M
+11    4     32M
+11    5     48M
+11    6     64M
+11    7     128M
+11    8     256M
+11    9     96M
+11    10     160M
+11    11     224M
 12    0     Integrated Only
 12    1     Discrete Only
 
diff --git a/src/mainboard/lenovo/x200/cmos.default b/src/mainboard/lenovo/x200/cmos.default
index ac9f96d73c..1d7b420b5a 100644
--- a/src/mainboard/lenovo/x200/cmos.default
+++ b/src/mainboard/lenovo/x200/cmos.default
@@ -13,3 +13,4 @@ sticky_fn=Disable
 power_management_beeps=Enable
 low_battery_beep=Enable
 sata_mode=AHCI
+gfx_uma_size=32M
\ No newline at end of file
diff --git a/src/mainboard/lenovo/x200/cmos.layout b/src/mainboard/lenovo/x200/cmos.layout
index 931cb4a52a..a00d703fe6 100644
--- a/src/mainboard/lenovo/x200/cmos.layout
+++ b/src/mainboard/lenovo/x200/cmos.layout
@@ -77,9 +77,8 @@ entries
 940         1       e       1        uwb
 
 # coreboot config options: northbridge
-941         3       e       11       gfx_uma_size
-
 944         8       h       0        volume
+952	    4	    e	    11	     gfx_uma_size
 
 # coreboot config options: check sums
 984          16       h       0        check_sum
@@ -125,12 +124,18 @@ enumerations
 9     1     Primary
 10    0     AHCI
 10    1     Compatible
-11    0     32M
-11    1     48M
-11    2     64M
-11    3     128M
-11    5     96M
-11    6     160M
+11    0     1M
+11    1     4M
+11    2     8M
+11    3     16M
+11    4     32M
+11    5     48M
+11    6     64M
+11    7     128M
+11    8     256M
+11    9     96M
+11    10    160M
+11    11    224M
 
 # -----------------------------------------------------------------
 checksums
diff --git a/src/mainboard/roda/rk9/cmos.layout b/src/mainboard/roda/rk9/cmos.layout
index f567b976d1..c0ea4fc43f 100644
--- a/src/mainboard/roda/rk9/cmos.layout
+++ b/src/mainboard/roda/rk9/cmos.layout
@@ -70,9 +70,9 @@ entries
 984          16       h       0        check_sum
 
 # coreboot config options: northbridge
-1000         3       e       10       gfx_uma_size
+1000         4       e       10       gfx_uma_size
 
-#1003        21       r       0        unused
+#1004        20       r       0        unused
 
 # ram initialization internal data
 1024        128       r       0        read_training_results
@@ -112,13 +112,18 @@ enumerations
 8     1     Yes
 9     0     AHCI
 9     1     Compatible
-10    0     32M
-10    1     48M
-10    2     64M
-10    3     128M
-10    5     96M
-10    6     160M
-
+11    0     1M
+11    1     4M
+11    2     8M
+11    3     16M
+11    4     32M
+11    5     48M
+11    6     64M
+11    7     128M
+11    8     256M
+11    9     96M
+11    10     160M
+11    11     224M
 # -----------------------------------------------------------------
 checksums
 
diff --git a/src/northbridge/intel/gm45/igd.c b/src/northbridge/intel/gm45/igd.c
index 7e7bbbe9cc..dc0cc91fd3 100644
--- a/src/northbridge/intel/gm45/igd.c
+++ b/src/northbridge/intel/gm45/igd.c
@@ -153,10 +153,13 @@ void igd_compute_ggc(sysinfo_t *const sysinfo)
 		/* Graphics Stolen Memory: 2MB GTT (0x0300) when VT-d disabled,
 		   2MB GTT + 2MB shadow GTT (0x0b00) else. */
 		if (get_option(&gfxsize, "gfx_uma_size") != CB_SUCCESS) {
-			/* 0 for 32MB */
-			gfxsize = 0;
+			/* 4 for 32MB, default if not set in cmos */
+			gfxsize = 4;
 		}
-		sysinfo->ggc = 0x0300 | ((gfxsize + 5) << 4);
+		/* Handle invalid cmos settings */
+		if (gfxsize > 11)
+			gfxsize = 4;
+		sysinfo->ggc = 0x0300 | ((gfxsize + 1) << 4);
 		if (!(capid & (1 << (48 - 32))))
 			sysinfo->ggc |= 0x0800;
 	}