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authorRichard Spiegel <richard.spiegel@silverbackltd.com>2018-02-05 17:20:50 -0700
committerMartin Roth <martinroth@google.com>2018-02-06 15:24:19 +0000
commit7b6a32f5c4e71e712e03a0de1bcb3ec11d62ad72 (patch)
tree40f715a3af9a04f4c0492d8159e011f54187d1a7
parent7492bcbb5a33fdcd7b1ed733acc6968a218bbf28 (diff)
downloadcoreboot-7b6a32f5c4e71e712e03a0de1bcb3ec11d62ad72.tar.xz
mb/google/kahlee: Remove cmos.layout
CMOS layout is not used and can be removed. A change to Kconfig is needed in order not to break the build. BUG=b:64207749 TEST=Build kahlee. Change-Id: Ib5d18e80a56111d96c730420db865194c71de1b3 Signed-off-by: Richard Spiegel <richard.spiegel@silverbackltd.com> Reviewed-on: https://review.coreboot.org/23596 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Martin Roth <martinroth@google.com>
-rw-r--r--src/mainboard/google/kahlee/Kconfig1
-rw-r--r--src/mainboard/google/kahlee/cmos.layout103
2 files changed, 0 insertions, 104 deletions
diff --git a/src/mainboard/google/kahlee/Kconfig b/src/mainboard/google/kahlee/Kconfig
index b4067e8572..6e4e971de1 100644
--- a/src/mainboard/google/kahlee/Kconfig
+++ b/src/mainboard/google/kahlee/Kconfig
@@ -25,7 +25,6 @@ config BOARD_GOOGLE_BASEBOARD_KAHLEE
select EC_GOOGLE_CHROMEEC
select EC_GOOGLE_CHROMEEC_BOARDID
select EC_GOOGLE_CHROMEEC_LPC
- select HAVE_OPTION_TABLE
select HAVE_ACPI_TABLES
select GENERIC_SPD_BIN
select GFXUMA
diff --git a/src/mainboard/google/kahlee/cmos.layout b/src/mainboard/google/kahlee/cmos.layout
deleted file mode 100644
index 6fa02941b6..0000000000
--- a/src/mainboard/google/kahlee/cmos.layout
+++ /dev/null
@@ -1,103 +0,0 @@
-#*****************************************************************************
-#
-# This file is part of the coreboot project.
-#
-# Copyright (C) 2015 Advanced Micro Devices, Inc.
-#
-# This program is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; version 2 of the License.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#*****************************************************************************
-
-entries
-
-#start-bit length config config-ID name
-#0 8 r 0 seconds
-#8 8 r 0 alarm_seconds
-#16 8 r 0 minutes
-#24 8 r 0 alarm_minutes
-#32 8 r 0 hours
-#40 8 r 0 alarm_hours
-#48 8 r 0 day_of_week
-#56 8 r 0 day_of_month
-#64 8 r 0 month
-#72 8 r 0 year
-#80 4 r 0 rate_select
-#84 3 r 0 REF_Clock
-#87 1 r 0 UIP
-#88 1 r 0 auto_switch_DST
-#89 1 r 0 24_hour_mode
-#90 1 r 0 binary_values_enable
-#91 1 r 0 square-wave_out_enable
-#92 1 r 0 update_finished_enable
-#93 1 r 0 alarm_interrupt_enable
-#94 1 r 0 periodic_interrupt_enable
-#95 1 r 0 disable_clock_updates
-#96 288 r 0 temporary_filler
-0 384 r 0 reserved_memory
-384 1 e 4 boot_option
-386 1 e 1 ECC_memory
-388 4 h 0 reboot_counter
-#392 3 e 5 unused
-395 1 e 1 hw_scrubber
-396 1 e 1 interleave_chip_selects
-397 2 e 8 max_mem_clock
-399 1 e 2 multi_core
-400 1 e 1 power_on_after_fail
-412 4 e 6 debug_level
-416 4 e 7 boot_first
-420 4 e 7 boot_second
-424 4 e 7 boot_third
-428 4 h 0 boot_index
-432 8 h 0 boot_countdown
-440 4 e 9 slow_cpu
-444 1 e 1 nmi
-445 1 e 1 iommu
-#Used by ChromeOS:
-448 128 r 0 vbnv
-728 256 h 0 user_data
-984 16 h 0 check_sum
-# Reserve the extended AMD configuration registers
-1000 24 r 0 amd_reserved
-
-enumerations
-
-#ID value text
-1 0 Disable
-1 1 Enable
-2 0 Enable
-2 1 Disable
-4 0 Fallback
-4 1 Normal
-6 5 Notice
-6 6 Info
-6 7 Debug
-6 8 Spew
-7 0 Network
-7 1 HDD
-7 2 Floppy
-7 8 Fallback_Network
-7 9 Fallback_HDD
-7 10 Fallback_Floppy
-#7 3 ROM
-8 0 400Mhz
-8 1 333Mhz
-8 2 266Mhz
-8 3 200Mhz
-9 0 off
-9 1 87.5%
-9 2 75.0%
-9 3 62.5%
-9 4 50.0%
-9 5 37.5%
-9 6 25.0%
-9 7 12.5%
-
-checksums
-
-checksum 392 983 984