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authorTim Wawrzynczak <twawrzynczak@chromium.org>2019-04-26 15:03:33 -0600
committerPatrick Georgi <pgeorgi@google.com>2019-05-06 10:27:17 +0000
commit939440c48ba47401679dd65930464649398b78db (patch)
treeba07df7499452843221f3ba67e20e84d486a1d12
parent95f8884c955de7a2f46d7a324079f18208093157 (diff)
downloadcoreboot-939440c48ba47401679dd65930464649398b78db.tar.xz
soc/intel/cannonlake: Add GPIO dual-route support.
Select SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT in Kconfig BUG=none BRANCH=none TEST=compiles Change-Id: If5f59ea50c13bd1f279637e281468e6d0312dbab Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32486 Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r--src/soc/intel/cannonlake/Kconfig1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig
index 6759b7ff99..c06b91eb48 100644
--- a/src/soc/intel/cannonlake/Kconfig
+++ b/src/soc/intel/cannonlake/Kconfig
@@ -90,6 +90,7 @@ config CPU_SPECIFIC_OPTIONS
select SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG
select SOC_INTEL_COMMON_BLOCK_CPU
select SOC_INTEL_COMMON_BLOCK_CPU_MPINIT
+ select SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT
select SOC_INTEL_COMMON_BLOCK_GSPI_VERSION_2
select SOC_INTEL_COMMON_BLOCK_HDA
select SOC_INTEL_COMMON_BLOCK_SA