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author | Aaron Durbin <adurbin@chromium.org> | 2014-09-17 11:48:51 -0500 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2015-03-28 07:05:15 +0100 |
commit | 9a9273f0c76f3eb7d05af6239b15c0ac5014326d (patch) | |
tree | 25d1afd4701f89e7d9de3c52b47b225c83472b15 | |
parent | dec44e9086dd03ee237eac407af6393091fe36cc (diff) | |
download | coreboot-9a9273f0c76f3eb7d05af6239b15c0ac5014326d.tar.xz |
ryu: use generic spin table
With the generic spin table support in place, use that.
BUG=chrome-os-partner:32082
BRANCH=None
TEST=Booted into kernel.
Change-Id: I8644f8a81b24bf4e00f8fac1d1018f9db77c952f
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: b1a4fe27070a80c8448051ec0565120901378673
Original-Change-Id: Id0832a4553101a366f011099e0744f6630d91924
Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/218656
Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: http://review.coreboot.org/9086
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
-rw-r--r-- | src/mainboard/google/rush_ryu/Kconfig | 1 | ||||
-rw-r--r-- | src/mainboard/google/rush_ryu/devicetree.cb | 2 |
2 files changed, 3 insertions, 0 deletions
diff --git a/src/mainboard/google/rush_ryu/Kconfig b/src/mainboard/google/rush_ryu/Kconfig index ec6eadb86b..6fb21fb3b9 100644 --- a/src/mainboard/google/rush_ryu/Kconfig +++ b/src/mainboard/google/rush_ryu/Kconfig @@ -32,6 +32,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select BOARD_ROMSIZE_KB_4096 select VIRTUAL_DEV_SWITCH select TERTIARY_BOARD_ID + select ARCH_SPINTABLE config MAINBOARD_DIR string diff --git a/src/mainboard/google/rush_ryu/devicetree.cb b/src/mainboard/google/rush_ryu/devicetree.cb index 66d91ec6a3..98284fc4e6 100644 --- a/src/mainboard/google/rush_ryu/devicetree.cb +++ b/src/mainboard/google/rush_ryu/devicetree.cb @@ -18,6 +18,8 @@ ## chip soc/nvidia/tegra132 + register "spintable_addr" = "0x80000008" + device cpu_cluster 0 on device cpu 0 on end device cpu 1 on end |