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authorScott Duplichan <scott@notabs.org>2011-05-15 21:45:46 +0000
committerMarc Jones <marc.jones@amd.com>2011-05-15 21:45:46 +0000
commit9ab3c6c3a95d0dd438e9b105a22a45f021a24aec (patch)
treeb0a1d0183c79c1843a0abbc5c9dafdc32046be07
parentbe8fae1c710c71c9bf7479cf3d91a9f17a5594d1 (diff)
downloadcoreboot-9ab3c6c3a95d0dd438e9b105a22a45f021a24aec.tar.xz
Build device paths for AP cores so that coreboot will report them to the OS.
Signed-off-by: Scott Duplichan <scott@notabs.org> Acked-by: Marc Jones <marcj303@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6581 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
-rw-r--r--src/northbridge/amd/agesa_wrapper/family14/northbridge.c15
1 files changed, 15 insertions, 0 deletions
diff --git a/src/northbridge/amd/agesa_wrapper/family14/northbridge.c b/src/northbridge/amd/agesa_wrapper/family14/northbridge.c
index 45627cee44..50748eb904 100644
--- a/src/northbridge/amd/agesa_wrapper/family14/northbridge.c
+++ b/src/northbridge/amd/agesa_wrapper/family14/northbridge.c
@@ -788,7 +788,22 @@ static void cpu_bus_set_resources(device_t dev)
static void cpu_bus_init(device_t dev)
{
+ struct device_path cpu_path;
+ device_t cpu;
+ int apic_id;
+
initialize_cpus(dev->link_list);
+
+ /* Build the AP cpu device path(s) */
+ for (apic_id = 1; apic_id < CONFIG_MAX_CPUS; apic_id++) {
+ cpu_path.type = DEVICE_PATH_APIC;
+ cpu_path.apic.apic_id = apic_id;
+ cpu = alloc_dev(dev->link_list, &cpu_path);
+ if (!cpu) return;
+ cpu->enabled = 1;
+ cpu->path.apic.node_id = 0;
+ cpu->path.apic.core_id = apic_id;
+ }
}