diff options
| author | Kane Chenffd <kane_chen@pegatron.corp-partner.google.com> | 2018-12-12 15:57:04 +0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-12-28 12:21:22 +0000 |
| commit | b3591f39823949acf90e1172f2632ec08f9620ed (patch) | |
| tree | 9b831c921527ae36ff87625d69442e1c2ebc452f | |
| parent | c21df03ab675b91b35cdf16abcd6d560eb634121 (diff) | |
| download | coreboot-b3591f39823949acf90e1172f2632ec08f9620ed.tar.xz | |
mainboard/google/poppy/variants/rammus: Fixed touchscreen function failed
According to issue tracker b:119238959 #4 & #6.
Hardware modify design to make GPP_E3 to be a switch of touchscreen
I2C CLK and SDA.
Control GPP_E3 to make touchscreen I2C CLK and SDA keep low during
power on initialization to avoid data transfer during this time.
After touchscreen IC initial complete, control GPP_E3 to high to
make touchscreen I2C CLK and SDA work normally.
Depending on touchscreen IC specification, device take 105ms for
power on initialization.
Change delay time from 120ms to 105ms.
BUG=b:119238959
BRANCH=firmware-rammus-11275.B
TEST=emerge-rammus coreboot chromeos-ec chromeos-bootimage
Flash FW to DUT, run S5 stress test and verify the result
Signed-off-by: YanRu Chen <kane_chen@pegatron.corp-partner.google.com>
Change-Id: I86452c1445243c499aeaf931dba286db169c5628
Reviewed-on: https://review.coreboot.org/c/30180
Reviewed-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
| -rw-r--r-- | src/mainboard/google/poppy/variants/rammus/devicetree.cb | 4 | ||||
| -rw-r--r-- | src/mainboard/google/poppy/variants/rammus/gpio.c | 4 |
2 files changed, 5 insertions, 3 deletions
diff --git a/src/mainboard/google/poppy/variants/rammus/devicetree.cb b/src/mainboard/google/poppy/variants/rammus/devicetree.cb index 3af712f5ec..7159c02d86 100644 --- a/src/mainboard/google/poppy/variants/rammus/devicetree.cb +++ b/src/mainboard/google/poppy/variants/rammus/devicetree.cb @@ -264,7 +264,9 @@ chip soc/intel/skylake register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_E7_IRQ)" register "generic.probed" = "1" register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C22)" - register "generic.enable_delay_ms" = "120" + register "generic.enable_delay_ms" = "105" + register "generic.stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_E3)" + register "generic.stop_off_delay_ms" = "1" register "generic.has_power_resource" = "1" register "generic.disable_gpio_export_in_crs" = "1" register "hid_desc_reg_offset" = "0x0" diff --git a/src/mainboard/google/poppy/variants/rammus/gpio.c b/src/mainboard/google/poppy/variants/rammus/gpio.c index 771a3f4545..8b8dd12bcd 100644 --- a/src/mainboard/google/poppy/variants/rammus/gpio.c +++ b/src/mainboard/google/poppy/variants/rammus/gpio.c @@ -215,8 +215,8 @@ static const struct pad_config gpio_table[] = { PAD_CFG_NC(GPP_E1), /* E2 : SATAXPCIE2 ==> NC */ PAD_CFG_NC(GPP_E2), - /* E3 : CPU_GP0 ==> NC */ - PAD_CFG_NC(GPP_E3), + /* E3 : CPU_GP0 ==> TOUCHSCREEN I2C OPERATION ENABLE/DISABLE. */ + PAD_CFG_GPO(GPP_E3, 0, DEEP), /* E4 : SATA_DEVSLP0 ==> NC */ PAD_CFG_NC(GPP_E4), /* E5 : SATA_DEVSLP1 ==> NC */ |