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authorAaron Durbin <adurbin@chromium.org>2016-08-15 14:13:05 -0500
committerAaron Durbin <adurbin@chromium.org>2016-08-15 21:24:02 +0200
commitc3b024e99baf8d27ae1554b0dd0ef061f82b64ee (patch)
tree3141ea0a63d1b48e99cee121a5f1530bfc4cb2a5
parentedd79590b06791de4908e93ab65d4ee09e3df85a (diff)
downloadcoreboot-c3b024e99baf8d27ae1554b0dd0ef061f82b64ee.tar.xz
Revert "Kconfig: separate memory mapped boot device from SPI"
This reverts commit a83bbf58541cf41ea7a97dedbc8c02dffa59e86d. This was submitted out of order. Change-Id: Ic5a28faf94c1f1901a72e46343722eb4224c5086 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/16226 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Nico Huber <nico.h@gmx.de>
-rw-r--r--src/Kconfig7
-rw-r--r--src/drivers/elog/elog.c4
-rw-r--r--src/drivers/spi/Kconfig7
-rw-r--r--src/lib/cbfs.c2
-rw-r--r--src/soc/intel/apollolake/romstage.c3
5 files changed, 11 insertions, 12 deletions
diff --git a/src/Kconfig b/src/Kconfig
index 44848d810c..3af27691e6 100644
--- a/src/Kconfig
+++ b/src/Kconfig
@@ -471,13 +471,6 @@ endmenu
source "src/acpi/Kconfig"
-config BOOT_DEVICE_MEMORY_MAPPED
- bool
- default y if ARCH_X86 && BOOT_DEVICE_SPI_FLASH
- default n
- help
- Inform system if SPI is memory-mapped or not.
-
config RTC
bool
default n
diff --git a/src/drivers/elog/elog.c b/src/drivers/elog/elog.c
index f046a3483b..55b8974304 100644
--- a/src/drivers/elog/elog.c
+++ b/src/drivers/elog/elog.c
@@ -586,8 +586,8 @@ static int elog_shrink(void)
*/
static inline u8 *elog_flash_offset_to_address(void)
{
- /* Only support memory-mapped devices. */
- if (!IS_ENABLED(CONFIG_BOOT_DEVICE_MEMORY_MAPPED))
+ /* Only support memory-mapped SPI devices. */
+ if (!IS_ENABLED(CONFIG_SPI_FLASH_MEMORY_MAPPED))
return NULL;
if (!elog_spi)
diff --git a/src/drivers/spi/Kconfig b/src/drivers/spi/Kconfig
index 7776d5bb2f..194e61f2f9 100644
--- a/src/drivers/spi/Kconfig
+++ b/src/drivers/spi/Kconfig
@@ -37,6 +37,13 @@ config SPI_ATOMIC_SEQUENCING
in the SPI controller. Hardware manages the transaction instead of
software. This is common on x86 platforms.
+config SPI_FLASH_MEMORY_MAPPED
+ bool
+ default y if ARCH_X86
+ default n if !ARCH_X86
+ help
+ Inform system if SPI is memory-mapped or not.
+
config SPI_FLASH_SMM
bool "SPI flash driver support in SMM"
default n
diff --git a/src/lib/cbfs.c b/src/lib/cbfs.c
index 7318c87937..7a0f187092 100644
--- a/src/lib/cbfs.c
+++ b/src/lib/cbfs.c
@@ -193,7 +193,7 @@ int cbfs_prog_stage_load(struct prog *pstage)
/* Hacky way to not load programs over read only media. The stages
* that would hit this path initialize themselves. */
if (ENV_VERSTAGE && !IS_ENABLED(CONFIG_NO_XIP_EARLY_STAGES) &&
- IS_ENABLED(CONFIG_BOOT_DEVICE_MEMORY_MAPPED)) {
+ IS_ENABLED(CONFIG_SPI_FLASH_MEMORY_MAPPED)) {
void *mapping = rdev_mmap(fh, foffset, fsize);
rdev_munmap(fh, mapping);
if (mapping == load)
diff --git a/src/soc/intel/apollolake/romstage.c b/src/soc/intel/apollolake/romstage.c
index 067d654b25..8f17fddd69 100644
--- a/src/soc/intel/apollolake/romstage.c
+++ b/src/soc/intel/apollolake/romstage.c
@@ -160,8 +160,7 @@ void platform_fsp_memory_init_params_cb(struct FSPM_UPD *mupd)
* state machine transition to next boot state, so that it can function
* as designed.
*/
- mupd->FspmConfig.SkipCseRbp =
- IS_ENABLED(CONFIG_BOOT_DEVICE_MEMORY_MAPPED);
+ mupd->FspmConfig.SkipCseRbp = IS_ENABLED(CONFIG_SPI_FLASH_MEMORY_MAPPED);
}
__attribute__ ((weak))